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Common routines for reading from and writing to CPU control registers

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This commit is contained in:
Rafal Kupiec
2022-12-23 14:30:52 +01:00
parent 3e8bdfe9fe
commit 3ab1695968
6 changed files with 192 additions and 366 deletions
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2
xtldr/amd64/memory.c
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@@ -168,7 +168,7 @@ BlEnablePaging(IN PLIST_ENTRY MemoryMappings,
MemoryMap->DescriptorVersion, MemoryMap->Map);
/* Write PML4 to CR3 */
HlWriteCR3((UINT_PTR)*PtePointer);
HlWriteControlRegister(3, (UINT_PTR)*PtePointer);
/* Return success */
return STATUS_EFI_SUCCESS;

8
xtldr/i686/memory.c
View File

@@ -170,7 +170,7 @@ BlEnablePaging(IN PLIST_ENTRY MemoryMappings,
VirtualAddress = (PVOID)(UINT_PTR)(PDPTAddress + EFI_PAGE_SIZE + KSEG0_BASE);
/* Set base page frame number */
Address = 0x100000; // MEM_TOP_DOWN ?
Address = 0x100000;
/* Allocate pages for the PFN */
Status = BlEfiMemoryAllocatePages(4, &Address);
@@ -278,14 +278,14 @@ BlEnablePaging(IN PLIST_ENTRY MemoryMappings,
if(PaeExtension)
{
/* Enable Physical Address Extension (PAE) */
HlWriteCR4(HlReadCR4() | 0x00000020);
HlWriteControlRegister(4, HlReadControlRegister(4) | 0x00000020);
}
/* Write page mappings to CR3 */
HlWriteCR3((UINT_PTR)*PtePointer);
HlWriteControlRegister(3, (UINT_PTR)*PtePointer);
/* Enable paging */
HlWriteCR0(HlReadCR0() | 0x80000000);
HlWriteControlRegister(0, HlReadControlRegister(0) | 0x80000000);
/* Return success */
return STATUS_EFI_SUCCESS;