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Do not hardcode PML shift values

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This commit is contained in:
Rafal Kupiec 2024-05-27 22:26:05 +02:00
parent f968eb21fd
commit 6b1ccc4ce5
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
3 changed files with 10 additions and 9 deletions
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1
sdk/xtdk/amd64/mmtypes.h
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@ -30,6 +30,7 @@
#define MM_PDI_SHIFT 21 #define MM_PDI_SHIFT 21
#define MM_PPI_SHIFT 30 #define MM_PPI_SHIFT 30
#define MM_PXI_SHIFT 39 #define MM_PXI_SHIFT 39
#define MM_LA57_SHIFT 48
/* Number of PTEs per page */ /* Number of PTEs per page */
#define MM_PTE_PER_PAGE 512 #define MM_PTE_PER_PAGE 512

12
xtldr/arch/amd64/memory.c
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@ -165,11 +165,11 @@ BlMapPage(IN PXTBL_PAGE_MAPPING PageMap,
while(NumberOfPages > 0) while(NumberOfPages > 0)
{ {
/* Calculate the indices in the various Page Tables from the virtual address */ /* Calculate the indices in the various Page Tables from the virtual address */
Pml5Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 48)) >> 48; Pml5Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_LA57_SHIFT)) >> MM_LA57_SHIFT;
Pml4Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 39)) >> 39; Pml4Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PXI_SHIFT)) >> MM_PXI_SHIFT;
Pml3Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 30)) >> 30; Pml3Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PPI_SHIFT)) >> MM_PPI_SHIFT;
Pml2Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 21)) >> 21; Pml2Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PDI_SHIFT)) >> MM_PDI_SHIFT;
Pml1Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 12)) >> 12; Pml1Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PTI_SHIFT)) >> MM_PTI_SHIFT;
/* Check page map level */ /* Check page map level */
if(PageMap->PageMapLevel == 5) if(PageMap->PageMapLevel == 5)
@ -262,7 +262,7 @@ BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap,
else else
{ {
/* Calculate PML index based on provided self map address */ /* Calculate PML index based on provided self map address */
PmlIndex = (SelfMapAddress >> 39) & 0x1FF; PmlIndex = (SelfMapAddress >> MM_PXI_SHIFT) & 0x1FF;
/* Add self-mapping for PML4 */ /* Add self-mapping for PML4 */
((PHARDWARE_PTE)PageMap->PtePointer)[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE; ((PHARDWARE_PTE)PageMap->PtePointer)[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE;

6
xtldr/arch/i686/memory.c
View File

@ -260,10 +260,10 @@ BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap,
if(PageMap->PageMapLevel == 3) if(PageMap->PageMapLevel == 3)
{ {
/* Calculate PML index based on provided self map address */ /* Calculate PML index based on provided self map address */
PmlIndex = (SelfMapAddress >> 21) & 0x1FF; PmlIndex = (SelfMapAddress >> MM_PDI_SHIFT) & 0x1FF;
/* Get Page Directory */ /* Get Page Directory */
Pml = (PHARDWARE_PTE)(((PHARDWARE_PTE)PageMap->PtePointer)[SelfMapAddress >> 30].PageFrameNumber * EFI_PAGE_SIZE); Pml = (PHARDWARE_PTE)(((PHARDWARE_PTE)PageMap->PtePointer)[SelfMapAddress >> MM_PPI_SHIFT].PageFrameNumber * EFI_PAGE_SIZE);
/* Add self-mapping for PML3 (PAE enabled) */ /* Add self-mapping for PML3 (PAE enabled) */
for(Index = 0; Index < 4; Index++) for(Index = 0; Index < 4; Index++)
@ -276,7 +276,7 @@ BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap,
else else
{ {
/* Calculate PML index based on provided self map address */ /* Calculate PML index based on provided self map address */
PmlIndex = (SelfMapAddress >> 22); PmlIndex = (SelfMapAddress >> MM_PDI_LEGACY_SHIFT);
/* Add self-mapping for PML2 (PAE disabled) */ /* Add self-mapping for PML2 (PAE disabled) */
((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE; ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE;