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Initialize segments and processor registers for i686 architecture

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This commit is contained in:
Rafal Kupiec 2023-02-05 15:45:22 +01:00
parent 2ba42c5270
commit 76f22fbdc4
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
2 changed files with 39 additions and 6 deletions
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39
xtoskrnl/ar/i686/procsup.c
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@ -58,9 +58,15 @@ ArInitializeProcessor(VOID)
/* Enter passive IRQ level */ /* Enter passive IRQ level */
ProcessorBlock->Irql = PASSIVE_LEVEL; ProcessorBlock->Irql = PASSIVE_LEVEL;
/* Initialize segment registers */
ArpInitializeSegments();
/* Load FS segment */ /* Load FS segment */
ArLoadSegment(SEGMENT_FS, KGDT_R0_PB); ArLoadSegment(SEGMENT_FS, KGDT_R0_PB);
/* Initialize processor registers */
ArpInitializeProcessorRegisters();
/* Identify processor */ /* Identify processor */
ArpIdentifyProcessor(); ArpIdentifyProcessor();
} }
@ -209,6 +215,39 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
ProcessorBlock->Prcb.ProcessorState.SpecialRegisters.KernelDr7 = 0; ProcessorBlock->Prcb.ProcessorState.SpecialRegisters.KernelDr7 = 0;
} }
/**
* Initializes processor registers and other boot structures.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
ArpInitializeProcessorRegisters(VOID)
{
/* Clear EFLAGS register */
ArWriteEflagsRegister(0);
/* Enable write-protection */
ArWriteControlRegister(0, ArReadControlRegister(0) | CR0_WP);
}
/**
* Initializes segment registers.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
ArpInitializeSegments(VOID)
{
ArLoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
ArLoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
}
/** /**
* Initializes the kernel's Task State Segment (TSS). * Initializes the kernel's Task State Segment (TSS).
* *

6
xtoskrnl/ke/i686/krnlinit.c
View File

@ -20,12 +20,6 @@ XTAPI
VOID VOID
KepArchInitialize(VOID) KepArchInitialize(VOID)
{ {
/* Clear EFLAGS register */
ArWriteEflagsRegister(0);
/* Enable write-protection */
ArWriteControlRegister(0, ArReadControlRegister(0) | CR0_WP);
/* Re-enable IDE interrupts */ /* Re-enable IDE interrupts */
HlIoPortOutByte(0x376, 0); HlIoPortOutByte(0x376, 0);
HlIoPortOutByte(0x3F6, 0); HlIoPortOutByte(0x3F6, 0);