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Cleanup APIC related headers

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This commit is contained in:
Rafal Kupiec
2024-06-06 21:50:20 +02:00
parent 4212453cf5
commit 92e861ebae
5 changed files with 256 additions and 150 deletions
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47
sdk/xtdk/i686/hltypes.h
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@@ -61,6 +61,9 @@
#define APIC_TGM_EDGE 0
#define APIC_TGM_LEVEL 1
/* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64
/* 8259/ISP PIC ports definitions */
#define PIC1_CONTROL_PORT 0x20
#define PIC1_DATA_PORT 0x21
@@ -78,6 +81,50 @@
/* Initial stall factor */
#define INITIAL_STALL_FACTOR 100
/* APIC Register Address Map */
typedef enum _APIC_REGISTER
{
APIC_ID = 0x02, /* APIC ID Register */
APIC_VER = 0x03, /* APIC Version Register */
APIC_TPR = 0x08, /* Task Priority Register */
APIC_APR = 0x09, /* Arbitration Priority Register */
APIC_PPR = 0x0A, /* Processor Priority Register (R) */
APIC_EOI = 0x0B, /* EOI Register */
APIC_RRR = 0x0C, /* Remote Read Register */
APIC_LDR = 0x0D, /* Logical Destination Register */
APIC_DFR = 0x0E, /* Destination Format Register (not available in extended mode) */
APIC_SIVR = 0x0F, /* Spurious Interrupt Vector Register */
APIC_ISR = 0x10, /* Interrupt Service Register*/
APIC_TMR = 0x18, /* Trigger Mode Register */
APIC_IRR = 0x20, /* Interrupt Request Register */
APIC_ESR = 0x28, /* Error Status Register */
APIC_ICR0 = 0x30, /* Interrupt Command Register */
APIC_ICR1 = 0x31, /* Interrupt Command Register (not available in extended mode) */
APIC_TMRLVTR = 0x32, /* Timer Local Vector Table */
APIC_THRMLVTR = 0x33, /* Thermal Local Vector Table */
APIC_PCLVTR = 0x34, /* Performance Counter Local Vector Table */
APIC_LINT0 = 0x35, /* LINT0 Local Vector Table */
APIC_LINT1 = 0x36, /* LINT1 Local Vector Table */
APIC_ERRLVTR = 0x37, /* Error Local Vector Table */
APIC_TICR = 0x38, /* Initial Count Register for Timer */
APIC_TCCR = 0x39, /* Current Count Register for Timer */
APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
APIC_EAFR = 0x40, /* extended APIC Feature register */
APIC_EACR = 0x41, /* Extended APIC Control Register */
APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
APIC_EXT0LVTR = 0x50, /* Extended Interrupt 0 Local Vector Table */
APIC_EXT1LVTR = 0x51, /* Extended Interrupt 1 Local Vector Table */
APIC_EXT2LVTR = 0x52, /* Extended Interrupt 2 Local Vector Table */
APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */
} APIC_REGISTER, *PAPIC_REGISTER;
/* APIC mode list */
typedef enum _APIC_MODE
{
APIC_MODE_COMPAT,
APIC_MODE_X2APIC
} APIC_MODE, *PAPIC_MODE;
/* APIC destination short-hand enumeration list */
typedef enum _APIC_DSH
{