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Mask APIC ICR0 and disable APIC interrupts for initialization time by raising APIC TPR

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This commit is contained in:
Rafal Kupiec
2024-05-24 23:39:06 +02:00
parent b4588d5b4c
commit 94a40501d4
3 changed files with 111 additions and 1 deletions
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47
sdk/xtdk/amd64/hltypes.h
View File

@@ -73,6 +73,28 @@
/* Initial stall factor */
#define INITIAL_STALL_FACTOR 100
/* APIC destination short-hand enumeration list */
typedef enum _APIC_DSH
{
APIC_DSH_Destination,
APIC_DSH_Self,
APIC_DSH_AllIncludingSelf,
APIC_DSH_AllExclusingSelf
} APIC_DSH, *PAPIC_DSH;
/* APIC message type enumeration list */
typedef enum _APIC_MT
{
APIC_MT_Fixed = 0,
APIC_MT_LowestPriority = 1,
APIC_MT_SMI = 2,
APIC_MT_RemoteRead = 3,
APIC_MT_NMI = 4,
APIC_MT_INIT = 5,
APIC_MT_Startup = 6,
APIC_MT_ExtInt = 7,
} APIC_MT, *PAPIC_MT;
/* APIC Base Register */
typedef union _APIC_BASE_REGISTER
{
@@ -89,6 +111,31 @@ typedef union _APIC_BASE_REGISTER
};
} APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
/* APIC Command Register */
typedef union _APIC_COMMAND_REGISTER
{
ULONGLONG LongLong;
struct
{
ULONG Long0;
ULONG Long1;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG MessageType:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG ReservedMBZ:1;
ULONGLONG Level:1;
ULONGLONG TriggerMode:1;
ULONGLONG RemoteReadStatus:2;
ULONGLONG DestinationShortHand:2;
ULONGLONG Reserved2MBZ:36;
ULONGLONG Destination:8;
};
} APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
/* APIC Local Vector Table (LVT) Register */
typedef union _APIC_LVT_REGISTER
{

47
sdk/xtdk/i686/hltypes.h
View File

@@ -78,6 +78,28 @@
/* Initial stall factor */
#define INITIAL_STALL_FACTOR 100
/* APIC destination short-hand enumeration list */
typedef enum _APIC_DSH
{
APIC_DSH_Destination,
APIC_DSH_Self,
APIC_DSH_AllIncludingSelf,
APIC_DSH_AllExclusingSelf
} APIC_DSH, *PAPIC_DSH;
/* APIC message type enumeration list */
typedef enum _APIC_MT
{
APIC_MT_Fixed = 0,
APIC_MT_LowestPriority = 1,
APIC_MT_SMI = 2,
APIC_MT_RemoteRead = 3,
APIC_MT_NMI = 4,
APIC_MT_INIT = 5,
APIC_MT_Startup = 6,
APIC_MT_ExtInt = 7,
} APIC_MT, *PAPIC_MT;
/* APIC Base Register */
typedef union _APIC_BASE_REGISTER
{
@@ -94,6 +116,31 @@ typedef union _APIC_BASE_REGISTER
};
} APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
/* APIC Command Register */
typedef union _APIC_COMMAND_REGISTER
{
ULONGLONG LongLong;
struct
{
ULONG Long0;
ULONG Long1;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG MessageType:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG ReservedMBZ:1;
ULONGLONG Level:1;
ULONGLONG TriggerMode:1;
ULONGLONG RemoteReadStatus:2;
ULONGLONG DestinationShortHand:2;
ULONGLONG Reserved2MBZ:36;
ULONGLONG Destination:8;
};
} APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
/* APIC Local Vector Table (LVT) Register */
typedef union _APIC_LVT_REGISTER
{