forked from xt-sys/exectos
Register interrupt handlers once the APIC initialization is done
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c4ccf52782
commit
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@ -31,6 +31,7 @@ list(APPEND XTOSKRNL_SOURCE
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${XTOSKRNL_SOURCE_DIR}/ke/semphore.c
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${XTOSKRNL_SOURCE_DIR}/ke/semphore.c
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${XTOSKRNL_SOURCE_DIR}/ke/spinlock.c
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${XTOSKRNL_SOURCE_DIR}/ke/spinlock.c
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${XTOSKRNL_SOURCE_DIR}/ke/timer.c
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${XTOSKRNL_SOURCE_DIR}/ke/timer.c
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${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/irqs.c
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${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.c
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${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.c
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${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.c
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${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.c
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${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.c
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${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.c
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@ -539,8 +539,8 @@ ArpSetIdtGate(IN PKIDTENTRY Idt,
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IN USHORT Access)
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IN USHORT Access)
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{
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{
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/* Setup the gate */
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/* Setup the gate */
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Idt[Vector].OffsetLow = (ULONG_PTR)Handler;
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Idt[Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);
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Idt[Vector].OffsetMiddle = ((ULONG_PTR)Handler >> 16);
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Idt[Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF);
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Idt[Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
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Idt[Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
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Idt[Vector].Dpl = Access;
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Idt[Vector].Dpl = Access;
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Idt[Vector].IstIndex = Ist;
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Idt[Vector].IstIndex = Ist;
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@ -176,7 +176,7 @@ HlpInitializeApic()
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HlWriteApicRegister(APIC_LDR, (1UL << CpuNumber) << 24);
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HlWriteApicRegister(APIC_LDR, (1UL << CpuNumber) << 24);
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}
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}
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/* Set the spurious interrupt vector and register interrupt handlers */
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/* Set the spurious interrupt vector */
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SpuriousRegister.Long = HlReadApicRegister(APIC_SIVR);
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SpuriousRegister.Long = HlReadApicRegister(APIC_SIVR);
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SpuriousRegister.Vector = APIC_VECTOR_SPURIOUS;
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SpuriousRegister.Vector = APIC_VECTOR_SPURIOUS;
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SpuriousRegister.SoftwareEnable = 1;
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SpuriousRegister.SoftwareEnable = 1;
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@ -217,4 +217,8 @@ HlpInitializeApic()
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/* Clear errors after enabling vectors */
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/* Clear errors after enabling vectors */
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HlWriteApicRegister(APIC_ESR, 0);
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HlWriteApicRegister(APIC_ESR, 0);
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/* Register interrupt handlers once the APIC initialization is done */
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KeSetInterruptHandler(APIC_VECTOR_SPURIOUS, HlpHandleApicSpuriousService);
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KeSetInterruptHandler(PIC1_VECTOR_SPURIOUS, HlpHandlePicSpuriousService);
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}
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}
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@ -77,6 +77,11 @@ KeSetEvent(IN PKEVENT Event,
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IN KPRIORITY Increment,
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IN KPRIORITY Increment,
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IN BOOLEAN Wait);
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IN BOOLEAN Wait);
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XTAPI
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VOID
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KeSetInterruptHandler(IN ULONG Vector,
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IN PVOID Handler);
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XTAPI
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XTAPI
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VOID
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VOID
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KeStartThread(IN PKTHREAD Thread);
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KeStartThread(IN PKTHREAD Thread);
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39
xtoskrnl/ke/amd64/irqs.c
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39
xtoskrnl/ke/amd64/irqs.c
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@ -0,0 +1,39 @@
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/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/ke/amd64/irqs.c
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* DESCRIPTION: Kernel interrupts support for amd64 architecture
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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*/
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#include <xtos.h>
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/**
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* Sets new interrupt handler for the existing IDT entry.
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*
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* @param HalVector
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* Supplies the HAL vector number.
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*
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* @param Handler
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* Supplies the new interrupt handler.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KeSetInterruptHandler(IN ULONG Vector,
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IN PVOID Handler)
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{
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PKPROCESSOR_BLOCK ProcessorBlock;
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/* Get current processor block */
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ProcessorBlock = KeGetCurrentProcessorBlock();
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/* Update interrupt handler */
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ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);
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ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF);
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ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
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}
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38
xtoskrnl/ke/i686/irqs.c
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38
xtoskrnl/ke/i686/irqs.c
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@ -0,0 +1,38 @@
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/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/ke/i686/irqs.c
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* DESCRIPTION: Kernel interrupts support for i686 architecture
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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*/
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#include <xtos.h>
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/**
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* Sets new interrupt handler for the existing IDT entry.
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*
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* @param HalVector
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* Supplies the HAL vector number.
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*
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* @param Handler
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* Supplies the new interrupt handler.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KeSetInterruptHandler(IN ULONG Vector,
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IN PVOID Handler)
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{
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PKPROCESSOR_BLOCK ProcessorBlock;
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/* Get current processor block */
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ProcessorBlock = KeGetCurrentProcessorBlock();
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/* Update interrupt handler */
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ProcessorBlock->IdtBase[(UCHAR) Vector].Offset = (USHORT)((ULONG)Handler & 0xFFFF);
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ProcessorBlock->IdtBase[(UCHAR) Vector].ExtendedOffset = (USHORT)((ULONG)Handler >> 16);
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}
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