diff --git a/sdk/xtdk/amd64/hlfuncs.h b/sdk/xtdk/amd64/hlfuncs.h
index 947382a..2a88cc3 100644
--- a/sdk/xtdk/amd64/hlfuncs.h
+++ b/sdk/xtdk/amd64/hlfuncs.h
@@ -59,6 +59,10 @@ VOID
 HlIoPortOutLong(IN USHORT Port,
                 IN ULONG Value);
 
+XTCDECL
+VOID
+HlLoadGlobalDescriptorTable(IN PVOID Source);
+
 XTCDECL
 VOID
 HlLoadTaskRegister(USHORT Source);
diff --git a/sdk/xtdk/i686/hlfuncs.h b/sdk/xtdk/i686/hlfuncs.h
index e031f66..b0f919d 100644
--- a/sdk/xtdk/i686/hlfuncs.h
+++ b/sdk/xtdk/i686/hlfuncs.h
@@ -59,6 +59,10 @@ VOID
 HlIoPortOutLong(IN USHORT Port,
                 IN ULONG Value);
 
+XTCDECL
+VOID
+HlLoadGlobalDescriptorTable(IN PVOID Source);
+
 XTCDECL
 VOID
 HlLoadTaskRegister(USHORT Source);
diff --git a/xtoskrnl/hl/amd64/cpufunc.c b/xtoskrnl/hl/amd64/cpufunc.c
index cc1ae1e..9209f97 100644
--- a/xtoskrnl/hl/amd64/cpufunc.c
+++ b/xtoskrnl/hl/amd64/cpufunc.c
@@ -236,6 +236,26 @@ HlIoPortOutLong(IN USHORT Port,
                    "Nd" (Port));
 }
 
+/**
+ * Loads the values in the source operand into the global descriptor table register (GDTR).
+ *
+ * @param Source
+ *        Specifies a memory location that contains the base address of GDT.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+VOID
+HlLoadGlobalDescriptorTable(IN PVOID Source)
+{
+    asm volatile("lgdt %0"
+                 :
+                 : "m" (*(PSHORT)Source)
+                 : "memory");
+}
+
 /**
  * Loads Task Register (TR) with a segment selector that points to TSS.
  *
diff --git a/xtoskrnl/hl/i686/cpufunc.c b/xtoskrnl/hl/i686/cpufunc.c
index a7703a7..cef442e 100644
--- a/xtoskrnl/hl/i686/cpufunc.c
+++ b/xtoskrnl/hl/i686/cpufunc.c
@@ -236,6 +236,26 @@ HlIoPortOutLong(IN USHORT Port,
                    "Nd" (Port));
 }
 
+/**
+ * Loads the values in the source operand into the global descriptor table register (GDTR).
+ *
+ * @param Source
+ *        Specifies a memory location that contains the base address of GDT.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+VOID
+HlLoadGlobalDescriptorTable(IN PVOID Source)
+{
+    asm volatile("lgdt %0"
+                 :
+                 : "m" (*(PSHORT)Source)
+                 : "memory");
+}
+
 /**
  * Loads Task Register (TR) with a segment selector that points to TSS.
  *