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Implement PTE manipulation functions for AMD64 architecture

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This commit is contained in:
Aiken Harris
2025-08-17 21:48:28 +02:00
parent c3ece4f317
commit f30d3df5b3
3 changed files with 93 additions and 8 deletions
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16
xtoskrnl/mm/amd64/globals.c
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@@ -11,16 +11,16 @@
/* Page mapping routines for systems using 4-level paging (PML4) */
CMMPAGEMAP_ROUTINES MmpPml4Routines = {
// .ClearPte = MmpClearPte,
// .PteValid = MmpPml2PteValid,
// .SetPteCaching = MmpSetPml2PteCaching,
// .SetPte = MmpSetPml2Pte,
.ClearPte = MmpClearPte,
.PteValid = MmpPteValid,
.SetPteCaching = MmpSetPteCaching,
.SetPte = MmpSetPte,
};
/* Page mapping routines for systems using 5-level paging (PML5) */
CMMPAGEMAP_ROUTINES MmpPml5Routines = {
// .ClearPte = MmpClearPte,
// .PteValid = MmpPml3PteValid,
// .SetPteCaching = MmpSetPml3PteCaching,
// .SetPte = MmpSetPml3Pte,
.ClearPte = MmpClearPte,
.PteValid = MmpPteValid,
.SetPteCaching = MmpSetPteCaching,
.SetPte = MmpSetPte,
};