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Add more intrinsic routines

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This commit is contained in:
Rafal Kupiec 2023-01-13 22:32:45 +01:00
parent bff460a879
commit fb60625abc
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
6 changed files with 309 additions and 39 deletions
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17
sdk/xtdk/amd64/hlfuncs.h
View File

@ -75,6 +75,23 @@ XTCDECL
VOID
HlSetInterruptFlag();
XTCDECL
VOID
HlStoreGlobalDescriptorTable(OUT PVOID Destination);
XTCDECL
VOID
HlStoreInterruptDescriptorTable(OUT PVOID Destination);
XTCDECL
VOID
HlStoreSegment(IN USHORT Segment,
OUT PVOID Destination);
XTCDECL
VOID
HlStoreTaskRegister(OUT PVOID Destination);
XTCDECL
VOID
HlWriteControlRegister(IN USHORT ControlRegister,

8
sdk/xtdk/amd64/hltypes.h
View File

@ -49,6 +49,14 @@
#define CR4_XSAVE 0x00020000
#define CR4_RESERVED3 0xFFFC0000
/* Segment defintions */
#define SEGMENT_CS 0x2E
#define SEGMENT_DS 0x3E
#define SEGMENT_ES 0x26
#define SEGMENT_SS 0x36
#define SEGMENT_FS 0x64
#define SEGMENT_GS 0x65
/* CPUID features enumeration list */
typedef enum _CPUID_FEATURES
{

17
sdk/xtdk/i686/hlfuncs.h
View File

@ -75,6 +75,23 @@ XTCDECL
VOID
HlSetInterruptFlag();
XTCDECL
VOID
HlStoreGlobalDescriptorTable(OUT PVOID Destination);
XTCDECL
VOID
HlStoreInterruptDescriptorTable(OUT PVOID Destination);
XTCDECL
VOID
HlStoreSegment(IN USHORT Segment,
OUT PVOID Destination);
XTCDECL
VOID
HlStoreTaskRegister(OUT PVOID Destination);
XTCDECL
VOID
HlWriteControlRegister(IN USHORT ControlRegister,

8
sdk/xtdk/i686/hltypes.h
View File

@ -49,6 +49,14 @@
#define CR4_XSAVE 0x00020000
#define CR4_RESERVED3 0xFFFC0000
/* Segment defintions */
#define SEGMENT_CS 0x2E
#define SEGMENT_DS 0x3E
#define SEGMENT_ES 0x26
#define SEGMENT_SS 0x36
#define SEGMENT_FS 0x64
#define SEGMENT_GS 0x65
/* CPUID features enumeration list */
typedef enum _CPUID_FEATURES
{

110
xtoskrnl/hl/amd64/cpufunc.c
View File

@ -357,6 +357,116 @@ HlSetInterruptFlag()
asm volatile("sti");
}
/**
* Stores GDT register into the given memory area.
*
* @param Destination
* Supplies a pointer to the memory area where GDT will be stored.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreGlobalDescriptorTable(OUT PVOID Destination)
{
asm volatile("sgdt %0"
:
: "m" (*(PSHORT)Destination)
: "memory");
}
/**
* Stores IDT register into the given memory area.
*
* @param Destination
* Supplies a pointer to the memory area where IDT will be stored.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreInterruptDescriptorTable(OUT PVOID Destination)
{
asm volatile("sidt %0"
:
: "m" (*(PSHORT)Destination)
: "memory");
}
/**
* Stores specified segment into the given memory area.
*
* @param Segment
* Supplies a segment identification.
*
* @param Destination
* Supplies a pointer to the memory area where segment data will be stored.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreSegment(IN USHORT Segment,
OUT PVOID Destination)
{
switch(Segment)
{
case SEGMENT_CS:
asm volatile("movl %%cs, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_DS:
asm volatile("movl %%ds, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_ES:
asm volatile("movl %%es, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_FS:
asm volatile("movl %%fs, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_GS:
asm volatile("movl %%gs, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_SS:
asm volatile("movl %%ss, %0"
: "=r" (*(PUINT)Destination));
break;
default:
Destination = NULL;
break;
}
}
/**
* Stores TR into the given memory area.
*
* @param Destination
* Supplies a pointer to the memory area where TR will be stores.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreTaskRegister(OUT PVOID Destination)
{
asm volatile("str %0"
:
: "m" (*(PULONG)Destination)
: "memory");
}
/**
* Writes a value to the specified CPU control register.
*

110
xtoskrnl/hl/i686/cpufunc.c
View File

@ -348,6 +348,116 @@ HlSetInterruptFlag()
asm volatile("sti");
}
/**
* Stores GDT register into the given memory area.
*
* @param Destination
* Supplies a pointer to the memory area where GDT will be stored.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreGlobalDescriptorTable(OUT PVOID Destination)
{
asm volatile("sgdt %0"
:
: "m" (*(PSHORT)Destination)
: "memory");
}
/**
* Stores IDT register into the given memory area.
*
* @param Destination
* Supplies a pointer to the memory area where IDT will be stored.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreInterruptDescriptorTable(OUT PVOID Destination)
{
asm volatile("sidt %0"
:
: "m" (*(PSHORT)Destination)
: "memory");
}
/**
* Stores specified segment into the given memory area.
*
* @param Segment
* Supplies a segment identification.
*
* @param Destination
* Supplies a pointer to the memory area where segment data will be stored.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreSegment(IN USHORT Segment,
OUT PVOID Destination)
{
switch(Segment)
{
case SEGMENT_CS:
asm volatile("movl %%cs, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_DS:
asm volatile("movl %%ds, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_ES:
asm volatile("movl %%es, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_FS:
asm volatile("movl %%fs, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_GS:
asm volatile("movl %%gs, %0"
: "=r" (*(PUINT)Destination));
break;
case SEGMENT_SS:
asm volatile("movl %%ss, %0"
: "=r" (*(PUINT)Destination));
break;
default:
Destination = NULL;
break;
}
}
/**
* Stores TR into the given memory area.
*
* @param Destination
* Supplies a pointer to the memory area where TR will be stores.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlStoreTaskRegister(OUT PVOID Destination)
{
asm volatile("str %0"
:
: "m" (*(PULONG)Destination)
: "memory");
}
/**
* Writes a value to the specified CPU control register.
*