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Code Pull Requests Activity
956 Commits 1 Branch 0 Tags
574582f97743917d3df2e7a3fb964b5700776d2b
Commit Graph

110 Commits

Author SHA1 Message Date
belliash
10ccf67e8e Add missing forward declarations 2023-03-14 22:50:32 +01:00
belliash
5677719038 Initialize thread context for AMD64 2023-03-14 17:37:20 +01:00
belliash
fd8eec1d86 Add EFLAGS and THREAD_ENVIRONMENT_BLOCK for amd64 2023-03-05 19:03:34 +01:00
belliash
c5a9253ea8 Implement ArLoadLocalDescriptorTable() routine 2023-03-02 23:04:36 +01:00
belliash
870a6680b0 Add thread information block 2023-03-01 00:14:06 +01:00
belliash
ef23acc3bc Add Deferred Procedure Call (DPC) and processor power state related structures 2023-02-27 19:58:47 +01:00
belliash
e41de62dab Implement ArYieldProcessor() routine 2023-02-27 17:28:20 +01:00
belliash
c8428241dd Add missing headers containing forward references of MM routines 2023-02-20 22:22:32 +01:00
belliash
b1c2b209e3 Implement RtlGetStackLimits() routine 2023-02-15 20:12:58 +01:00
belliash
2e790bd9b2 Add pages related macros and definitions 2023-02-13 23:01:20 +01:00
belliash
e94cb2d3a7 Processor identification structures 2023-02-10 17:14:12 +01:00
belliash
e645cf664c Set process and thread information in processor control block 2023-02-09 17:30:24 +01:00
belliash
9132c47cd9 Initial process and thread related structures 2023-02-08 23:40:58 +01:00
belliash
c6cadbd655 Initialize MXCSR register 2023-02-05 00:30:12 +01:00
belliash
5eaf7d63a3 Initialize Page Attribute Table 2023-02-05 00:14:34 +01:00
belliash
55cdae7c83 Initialize AMD64 processor registers 2023-02-04 23:40:03 +01:00
belliash
269214ed34 Another improvements to GDT 2023-02-03 18:00:37 +01:00
belliash
19f34d4b17 Cleanup the code 2023-02-02 19:42:57 +01:00
belliash
715f875c4f Set alignment and packing properly 2023-02-02 17:01:18 +01:00
belliash
73fc7607cd There is no need to specify alignment of the structure in the forward reference 2023-02-02 15:37:57 +01:00
belliash
21fbe6febe Add IDT related definitions 2023-02-01 20:14:10 +01:00
belliash
a761d3125a Architecture specific initialization prior to processor structures initialization 2023-01-30 20:34:05 +01:00
belliash
6f068513cd Initial processor block initialization 2023-01-30 19:07:05 +01:00
belliash
ebe6792f2b Add MSR (Model Specific Registers) values 2023-01-30 17:59:00 +01:00
belliash
7bf4a9ab8d Initialize boot CPU structures inside kernel on AMD64 2023-01-29 00:45:17 +01:00
belliash
27e2fdf4f2 Introduce architecture library as new kernel subsystem and move selected routines into new subsystem 2023-01-28 10:34:55 +01:00
belliash
e94e50b5d9 Implement HlLoadInterruptDescriptorTable() intrinsics for loading IDT 2023-01-26 20:08:57 +01:00
belliash
3ad3149f80 Add descriptor structure definition 2023-01-25 17:42:35 +01:00
belliash
bfc9db8b6d Unify KGDTENTRY and KIDTENTRY between architectures as much as possible 2023-01-25 17:35:03 +01:00
belliash
a366de618f AMD64 Interrupt request levels definitions 2023-01-25 17:08:42 +01:00
belliash
8f348c3954 Add GDT and Segments related definitions for AMD64 2023-01-25 17:05:15 +01:00
belliash
707dc37868 Fix type of Source parameter in HlLoadSegment() routine 2023-01-24 23:08:48 +01:00
belliash
35aa514f95 Implement HlLoadSegment() intrinsics routine 2023-01-24 19:27:18 +01:00
belliash
d3d8d144a0 Implement HlLoadGlobalDescriptorTable() intrinsic 2023-01-23 20:13:51 +01:00
belliash
c81b858757 Implement HlReadGSQuadWord() intrinsic 2023-01-23 19:59:54 +01:00
belliash
f20ab3e52e Implement HlLoadTaskRegister() for loading TSS segment selector into task register 2023-01-23 15:26:35 +01:00
belliash
fb60625abc Add more intrinsic routines 2023-01-13 22:32:45 +01:00
belliash
025e05013d Partially revert last changes 2023-01-10 22:51:38 +01:00
belliash
bac7af8a33 Cleanup data types 2023-01-09 23:07:21 +01:00
belliash
ca1d7ddfe8 Basic context, frames and exceptions definitions 2023-01-07 23:36:50 +01:00
belliash
f74ba62f24 Add GDT, IDT and TSS related structures 2023-01-07 13:33:16 +01:00
belliash
674e69da0e Cleanup useless externals 2023-01-05 23:38:58 +01:00
belliash
712de4e4e4 XTDK contains headers uniquely identified 2023-01-05 23:28:43 +01:00
belliash
3250ad67aa Rename header file 2023-01-05 23:09:54 +01:00
belliash
3131aac7a9 Move serial ports I/O address to architecture specific header 2023-01-05 15:58:36 +01:00
belliash
b7e5f1b5c1 Use CR constants instead of hardcoded values 2023-01-04 16:33:28 +01:00
belliash
fcfa575bff Implement HlReadTimeStampCounter() routine 2022-12-27 23:28:27 +01:00
belliash
f46615f92c Implement HlInvalidateTlbEntry(), HlReadModelSpecificRegister() and HlWriteModelSpecificRegister() routines 2022-12-27 23:19:33 +01:00
belliash
602d89ef27 Fixes in HlIoPortInShort() and HlIoPortInLong() routines 2022-12-27 22:43:19 +01:00
belliash
9828b23400 Implement HlIoPortInShort(), HlIoPortInLong(), HlIoPortOutShort() and HlIoPortOutLong() routines 2022-12-27 22:26:45 +01:00