Commit Graph

18 Commits

Author SHA1 Message Date
91a5db2ee4 Implement PML5 support in XtpMapHardwareMemoryPool 2025-08-18 12:13:48 +02:00
d602038858 Temporarily disable LA57 paging 2025-08-18 00:10:32 +02:00
3ca6d04f6b Add definitions for 5-level paging and refactor constants 2025-08-16 00:22:21 +02:00
bf291613a3 Add debug messages to display PML set by bootloader 2025-08-10 18:07:26 +02:00
a33a45fc20 Implement paging level detection for AMD64 based on CPUID and boot parameters 2025-08-10 17:27:12 +02:00
e6ebac7cda Correct status variable type in XtpMapHardwareMemoryPool 2025-07-30 21:50:36 +02:00
66e136c7d6 Enable paging 2025-07-30 16:58:25 +02:00
29ff9e114e Mark XtMapHardwareMemoryPool() routine private 2024-06-02 17:34:30 +02:00
c1ab5fe98d Cleanup hardware allocation memory pool related code for i686 2024-06-02 17:32:39 +02:00
6176ca38a8 Cleanup hardware allocation memory pool related code 2024-06-02 17:29:31 +02:00
ae243a9d07 Map memory for hardware layer on amd64 2024-05-27 21:54:21 +02:00
1305672875 Properly, recursively self map page tables; currently only for AMD64 and PML4 2024-04-05 00:26:41 +02:00
e6736087ba Corrections in printing debug messages 2024-03-13 15:55:03 +01:00
98acc6f3d4 Use uppercase when printing status codes 2024-02-16 22:09:38 +01:00
af400920d0 Make a use of BlBuildPageMap() 2024-01-22 15:20:22 +01:00
0e4575b278 Use new paging implementation 2024-01-17 22:24:55 +01:00
11979f758b Conform BlExitBootServices() to UEFI Specification 2024-01-10 21:59:51 +01:00
4412d4fc98 Rewrite core of the XTLDR boot loader
Reviewed-on: xt-sys/exectos#7
Reviewed-by: Piotr Likoski <likoski@noreply.codingworkshop.git>
Co-authored-by: Rafal Kupiec <belliash@codingworkshop.eu.org>
Co-committed-by: Rafal Kupiec <belliash@codingworkshop.eu.org>
2024-01-09 18:51:04 +01:00