Respect architecture-specific PTE layouts and write PTEs via PML-aware helpers

xtoskrnl/mm/amd64/pagemap.cc

@@ -515,6 +515,28 @@ MM::PageMap::SetPteCaching(IN PMMPTE PtePointer,
     PtePointer->Hardware.WriteThrough = WriteThrough;
 }
 
+/**
+ * Writes a Page Table Entry (PTE) with the specified value.
+ *
+ * @param Pte
+ *        Pointer to the page table entry (PTE) to write.
+ *
+ * @param Value
+ *        The value to write to the PTE.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MM::PageMap::WritePte(IN PMMPTE Pte,
+                      IN MMPTE Value)
+{
+    /* Write PTE value */
+    Pte->Long = Value.Long;
+}
+
 /**
  * Gets the virtual address that is mapped by a given Page Directory Entry (PML4).
  *