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Respect architecture-specific PTE layouts and write PTEs via PML-aware helpers

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This commit is contained in:
Aiken Harris
2025-12-22 00:07:48 +01:00
parent 24dccf4bed
commit 755a167f2c
8 changed files with 144 additions and 25 deletions
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6
sdk/xtdk/i686/mmtypes.h
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@@ -154,7 +154,6 @@ typedef struct _HARDWARE_MODERN_PTE
/* Generic Page Table entry union to abstract PML2 and PML3 formats */
typedef union _HARDWARE_PTE
{
ULONGLONG Long;
HARDWARE_LEGACY_PTE Pml2;
HARDWARE_MODERN_PTE Pml3;
} HARDWARE_PTE, *PHARDWARE_PTE;
@@ -250,7 +249,7 @@ typedef struct _MMPML2_PTE_TRANSITION
typedef union _MMPML2_PTE
{
ULONG Long;
HARDWARE_PTE Flush;
HARDWARE_LEGACY_PTE Flush;
MMPML2_PTE_HARDWARE Hardware;
MMPML2_PTE_PROTOTYPE Prototype;
MMPML2_PTE_SOFTWARE Software;
@@ -345,7 +344,7 @@ typedef struct _MMPML3_PTE_TRANSITION
typedef union _MMPML3_PTE
{
ULONGLONG Long;
HARDWARE_PTE Flush;
HARDWARE_MODERN_PTE Flush;
MMPML3_PTE_HARDWARE Hardware;
MMPML3_PTE_PROTOTYPE Prototype;
MMPML3_PTE_SOFTWARE Software;
@@ -357,7 +356,6 @@ typedef union _MMPML3_PTE
/* Generic Page Table Entry union to abstract PML2 and PML3 formats */
typedef union _MMPTE
{
ULONGLONG Long;
MMPML2_PTE Pml2;
MMPML3_PTE Pml3;
} MMPTE, *PMMPTE;

2
xtoskrnl/includes/mm/amd64/pagemap.hh
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@@ -60,6 +60,8 @@ namespace MM
XTAPI VOID SetPteCaching(IN PMMPTE PtePointer,
IN BOOLEAN CacheDisable,
IN BOOLEAN WriteThrough);
XTAPI VOID WritePte(IN PMMPTE Pte,
IN MMPTE Value);
} PAGEMAP, *PPAGEMAP;
class PageMapBasic final : public PageMap

2
xtoskrnl/includes/mm/amd64/paging.hh
View File

@@ -56,6 +56,8 @@ namespace MM
STATIC XTAPI VOID SetPteCaching(IN PMMPTE PtePointer,
IN BOOLEAN CacheDisable,
IN BOOLEAN WriteThrough);
STATIC XTAPI VOID WritePte(IN PMMPTE Pte,
IN MMPTE Value);
STATIC XTFASTCALL VOID ZeroPages(IN PVOID Address,
IN ULONG Size);

11
xtoskrnl/includes/mm/i686/pagemap.hh
View File

@@ -23,7 +23,7 @@ namespace MM
public:
VIRTUAL XTAPI PMMPTE AdvancePte(IN PMMPTE Pte,
IN ULONG Count) = 0;
XTAPI VOID ClearPte(IN PMMPTE PtePointer);
VIRTUAL XTAPI VOID ClearPte(IN PMMPTE PtePointer) = 0;
XTAPI ULONG GetEmptyPteList(VOID);
VIRTUAL XTAPI ULONG_PTR GetNextEntry(IN PMMPTE Pte) = 0;
VIRTUAL XTAPI PMMPTE GetNextPte(IN PMMPTE Pte) = 0;
@@ -54,6 +54,9 @@ namespace MM
VIRTUAL XTAPI VOID SetPteCaching(IN PMMPTE PtePointer,
IN BOOLEAN CacheDisable,
IN BOOLEAN WriteThrough) = 0;
VIRTUAL XTAPI VOID WritePte(IN PMMPTE Pte,
IN MMPTE Value) = 0;
} PAGEMAP, *PPAGEMAP;
class PageMapBasic final : public PageMap
@@ -61,6 +64,7 @@ namespace MM
public:
XTAPI PMMPTE AdvancePte(IN PMMPTE Pte,
IN ULONG Count);
XTAPI VOID ClearPte(IN PMMPTE PtePointer);
XTAPI ULONG_PTR GetNextEntry(IN PMMPTE Pte);
XTAPI PMMPTE GetNextPte(IN PMMPTE Pte);
XTAPI BOOLEAN GetOneEntry(IN PMMPTE Pte);
@@ -82,6 +86,8 @@ namespace MM
XTAPI VOID SetPteCaching(IN PMMPTE PtePointer,
IN BOOLEAN CacheDisable,
IN BOOLEAN WriteThrough);
XTAPI VOID WritePte(IN PMMPTE Pte,
IN MMPTE Value);
};
class PageMapXpa final : public PageMap
@@ -89,6 +95,7 @@ namespace MM
public:
XTAPI PMMPTE AdvancePte(IN PMMPTE Pte,
IN ULONG Count);
XTAPI VOID ClearPte(IN PMMPTE PtePointer);
XTAPI ULONG_PTR GetNextEntry(IN PMMPTE Pte);
XTAPI PMMPTE GetNextPte(IN PMMPTE Pte);
XTAPI BOOLEAN GetOneEntry(IN PMMPTE Pte);
@@ -110,6 +117,8 @@ namespace MM
XTAPI VOID SetPteCaching(IN PMMPTE PtePointer,
IN BOOLEAN CacheDisable,
IN BOOLEAN WriteThrough);
XTAPI VOID WritePte(IN PMMPTE Pte,
IN MMPTE Value);
};
}

2
xtoskrnl/includes/mm/i686/paging.hh
View File

@@ -52,6 +52,8 @@ namespace MM
STATIC XTAPI VOID SetPteCaching(IN PMMPTE PtePointer,
IN BOOLEAN CacheDisable,
IN BOOLEAN WriteThrough);
STATIC XTAPI VOID WritePte(IN PMMPTE Pte,
IN MMPTE Value);
STATIC XTFASTCALL VOID ZeroPages(IN PVOID Address,
IN ULONG Size);

22
xtoskrnl/mm/amd64/pagemap.cc
View File

@@ -515,6 +515,28 @@ MM::PageMap::SetPteCaching(IN PMMPTE PtePointer,
PtePointer->Hardware.WriteThrough = WriteThrough;
}
/**
* Writes a Page Table Entry (PTE) with the specified value.
*
* @param Pte
* Pointer to the page table entry (PTE) to write.
*
* @param Value
* The value to write to the PTE.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::PageMap::WritePte(IN PMMPTE Pte,
IN MMPTE Value)
{
/* Write PTE value */
Pte->Long = Value.Long;
}
/**
* Gets the virtual address that is mapped by a given Page Directory Entry (PML4).
*

102
xtoskrnl/mm/i686/pagemap.cc
View File

@@ -9,24 +9,6 @@
#include <xtos.hh>
/**
* Clears the contents of a page table entry (PTE).
*
* @param PtePointer
* Pointer to the page table entry (PTE) to be cleared.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::PageMap::ClearPte(IN PMMPTE PtePointer)
{
/* Clear PTE */
PtePointer->Long = 0;
}
/**
* Gets the value representing an empty PTE list.
*
@@ -212,6 +194,24 @@ MM::PageMapBasic::AdvancePte(IN PMMPTE Pte,
return (PMMPTE)((ULONG_PTR)Pte + (Count * sizeof(MMPML2_PTE)));
}
/**
* Clears the contents of a page table entry (PTE).
*
* @param PtePointer
* Pointer to the page table entry (PTE) to be cleared.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::PageMapBasic::ClearPte(IN PMMPTE PtePointer)
{
/* Clear PTE */
PtePointer->Pml2.Long = 0;
}
/**
* Gets the next entry in a PTE list.
*
@@ -469,7 +469,7 @@ MM::PageMapBasic::SetPte(IN PMMPTE PtePointer,
/* Set PTE */
PtePointer->Pml2.Hardware.PageFrameNumber = PageFrameNumber;
PtePointer->Pml2.Hardware.Valid = 1;
PtePointer->Long |= AttributesMask;
PtePointer->Pml2.Long |= AttributesMask;
}
/**
@@ -499,6 +499,28 @@ MM::PageMapBasic::SetPteCaching(IN PMMPTE PtePointer,
PtePointer->Pml2.Hardware.WriteThrough = WriteThrough;
}
/**
* Writes a PML2 page table entry (PTE) with the specified value.
*
* @param Pte
* Pointer to the page table entry (PTE) to write.
*
* @param Value
* The value to write to the PTE.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::PageMapBasic::WritePte(IN PMMPTE Pte,
IN MMPTE Value)
{
/* Write PTE value */
Pte->Pml2.Long = Value.Pml2.Long;
}
/**
* Advances a PTE pointer by a given number of entries, considering the actual PTE size for PML3.
*
@@ -521,6 +543,24 @@ MM::PageMapXpa::AdvancePte(IN PMMPTE Pte,
return (PMMPTE)((ULONG_PTR)Pte + (Count * sizeof(MMPML3_PTE)));
}
/**
* Clears the contents of a page table entry (PTE).
*
* @param PtePointer
* Pointer to the page table entry (PTE) to be cleared.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::PageMapXpa::ClearPte(IN PMMPTE PtePointer)
{
/* Clear PTE */
PtePointer->Pml3.Long = 0;
}
/**
* Gets the next entry in a PTE list.
*
@@ -777,7 +817,7 @@ MM::PageMapXpa::SetPte(IN PMMPTE PtePointer,
/* Set PTE */
PtePointer->Pml3.Hardware.PageFrameNumber = PageFrameNumber;
PtePointer->Pml3.Hardware.Valid = 1;
PtePointer->Long |= AttributesMask;
PtePointer->Pml3.Long |= AttributesMask;
}
/**
@@ -806,3 +846,25 @@ MM::PageMapXpa::SetPteCaching(IN PMMPTE PtePointer,
PtePointer->Pml3.Hardware.CacheDisable = CacheDisable;
PtePointer->Pml3.Hardware.WriteThrough = WriteThrough;
}
/**
* Writes a PML3 page table entry (PTE) with the specified value.
*
* @param Pte
* Pointer to the page table entry (PTE) to write.
*
* @param Value
* The value to write to the PTE.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::PageMapXpa::WritePte(IN PMMPTE Pte,
IN MMPTE Value)
{
/* Write PTE value */
Pte->Pml3.Long = Value.Pml3.Long;
}

22
xtoskrnl/mm/paging.cc
View File

@@ -520,3 +520,25 @@ MM::Paging::SetPteCaching(IN PMMPTE PtePointer,
/* Set caching attributes */
PmlRoutines->SetPteCaching(PtePointer, CacheDisable, WriteThrough);
}
/**
* Writes a Page Table Entry (PTE) with the specified value.
*
* @param Pte
* Pointer to the page table entry (PTE) to write.
*
* @param Value
* The value to write to the PTE.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::Paging::WritePte(IN PMMPTE Pte,
IN MMPTE Value)
{
/* Assign PTE value */
PmlRoutines->WritePte(Pte, Value);
}