perikiyoxd/exectos
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Code Pull Requests Activity
782 Commits 5 Branches 0 Tags
implement-ArpIdentifyProcessor
Commit Graph
95 Commits
Author SHA1 Message Date
perikiyoxd 363e100493 Saving processor features in the processor control block 
Fixed correct AMD Family 25 model detection
Fixed procedure for saving processor vendor name (previously corrupted)
Added a debugging print of the processor identification
 2024-05-06 17:55:37 +02:00
belliash 22693a48d3 Rework trap handling assembly code 2024-04-23 15:07:08 +02:00
belliash a36c02fde8 Use common name for EFLAGS and RFLAGS, regardless the CPU architecture 2024-04-21 22:35:06 +02:00
belliash 92ee74b494 Rework trap handling to access registers 2024-04-19 16:52:37 +02:00
belliash befa211aa7 Add PFN related structures and definitions 2024-04-08 19:03:58 +02:00
belliash 04e22c127e Initial memory manager initialization code 2024-04-07 10:26:12 +02:00
belliash d7b103f85d Add forward references for PTE related structures 2024-04-03 16:03:17 +02:00
belliash c6f3422c49 Update PTE related structures 2024-04-03 16:00:26 +02:00
belliash 4b2d8ded72 No parameters are expected, explicitly 2024-02-20 16:55:12 +01:00
belliash badb16e37d Add lock queue to processor control block 2024-02-05 19:21:19 +01:00
belliash af687603d0 Add kernel stack guard pages definition 2024-02-04 19:21:42 +01:00
belliash c716ad81f0 i686 supports switching to huge pages mode with 2MB or 4MB page size only 2024-01-18 14:48:43 +01:00
belliash 5acf8b4abd Add page size enumeration list 2024-01-18 14:22:51 +01:00
belliash e64cf4d0aa Add CR4_LA57 definition 2024-01-14 21:06:02 +01:00
belliash 0d1fcde3a5 Add missing StallScaleFactor to KPROCESSOR_BLOCK 2023-11-28 23:08:35 +01:00
belliash f6c621c2a6 Basic processor initialization code 2023-11-28 22:31:39 +01:00
belliash e5adc31af7 Implement basic APIC support, including X2APIC 2023-11-27 22:38:15 +01:00
belliash 4ca4e298f0 Add more PIC/APIC related definitions 2023-11-26 23:35:14 +01:00
belliash 14a966043e Add missing Interrupt request level definitions 2023-11-25 18:50:59 +01:00
belliash 0e6bf984a5 Add APIC vector definitions 2023-11-25 18:33:01 +01:00
belliash 55cc62f5a0 Rename KIRQL to KRUNLEVEL type 2023-11-25 00:32:55 +01:00
belliash a3c28cee73 Initial XTLDR APIC support, finds and maps base APIC address for kernel 2023-11-20 15:18:22 +01:00
belliash 83c0accc5f Update EFLAGS masks 2023-11-09 16:12:24 +01:00
belliash 641b34b119 Fixes in i686 version of KepInitializeThreadContext() 2023-11-08 16:06:01 +01:00
belliash 91ce0f9947 Compensate missing return address, which is a 4-byte on i686 and an 8-byte on amd64 2023-11-05 20:07:13 +01:00
belliash f05a262da2 Cleanup XTDK and XTOSKRNL headers 2023-10-29 09:58:47 +01:00
belliash 798e4c1d22 Cleanup MM subsystem headers 2023-10-29 00:52:05 +02:00
belliash 600c86949b Cleanup RTL subsystem headers 2023-10-29 00:14:01 +02:00
belliash d920cae481 Fix build by defining more routines used by XTLDR 2023-10-28 23:41:52 +02:00
belliash ad15c55a39 Cleanup AR subsystem headers 2023-10-28 23:35:34 +02:00
belliash 358b20f1a1 Reorder routines 2023-04-04 22:35:06 +02:00
belliash e6b64b741a Initialize thread context for i686 2023-03-15 23:05:18 +01:00
belliash 3afbc7e419 Introduce SIMD save area in place of FN/FX and use anonymous union inside FX_SAVE_AREA structure 2023-03-15 22:19:18 +01:00
belliash a8fa702b05 Unify KSWITCH_FRAME naming with AMD64 2023-03-15 19:15:31 +01:00
belliash 10ccf67e8e Add missing forward declarations 2023-03-14 22:50:32 +01:00
belliash cec8a13e4c Add context control flags and thread frames for i686 architecture 2023-03-14 22:47:32 +01:00
belliash 70795ae57a Add EFLAGS and THREAD_ENVIRONMENT_BLOCK for x86 2023-03-05 18:11:57 +01:00
belliash c5a9253ea8 Implement ArLoadLocalDescriptorTable() routine 2023-03-02 23:04:36 +01:00
belliash 870a6680b0 Add thread information block 2023-03-01 00:14:06 +01:00
belliash 3d42fcc0f5 Add KSWITCH_FRAME definition for i686 architecture 2023-03-01 00:03:20 +01:00
belliash ef23acc3bc Add Deferred Procedure Call (DPC) and processor power state related structures 2023-02-27 19:58:47 +01:00
belliash e41de62dab Implement ArYieldProcessor() routine 2023-02-27 17:28:20 +01:00
belliash c8428241dd Add missing headers containing forward references of MM routines 2023-02-20 22:22:32 +01:00
belliash b1c2b209e3 Implement RtlGetStackLimits() routine 2023-02-15 20:12:58 +01:00
belliash 18a39f95bc Add floating save area structure definitions 2023-02-15 20:07:17 +01:00
belliash 2e790bd9b2 Add pages related macros and definitions 2023-02-13 23:01:20 +01:00
belliash e94cb2d3a7 Processor identification structures 2023-02-10 17:14:12 +01:00
belliash e645cf664c Set process and thread information in processor control block 2023-02-09 17:30:24 +01:00
belliash 9132c47cd9 Initial process and thread related structures 2023-02-08 23:40:58 +01:00
belliash a32e18b237 Implement ArReadFSDualWord() routine 2023-02-07 23:19:22 +01:00