perikiyoxd/exectos
1
0
Fork 0
forked from xt-sys/exectos
Code Pull Requests Activity
821 Commits 5 Branches 0 Tags
03727a61d30d61c2e6dc26d6573b50c30846deba
Commit Graph
312 Commits
Author SHA1 Message Date
belliash 03727a61d3 Implement hardware layer pool memory management 2024-05-22 18:51:09 +02:00
belliash 2103b2dafd Make sure frame buffer is initialized before drawing 2024-05-18 16:57:38 +02:00
belliash d2014a5e82 Use HlpRGBColor() internally 2024-05-17 23:29:03 +02:00
belliash 811b173387 Re-enable interrupts only if they were enabled previously 2024-05-17 23:24:04 +02:00
belliash 740df726e9 Implement ArInterruptsEnabled() routine 2024-05-17 23:19:25 +02:00
belliash 5591e1b377 Fix ArGetCpuFlags() routine 2024-05-17 23:16:16 +02:00
belliash 41bc673694 Initialize framebuffer device based on a system resource provided by boot loader 2024-05-17 22:37:42 +02:00
belliash 8a15d46198 Initialize system resource as soon as possible 2024-05-17 22:31:29 +02:00
belliash 74c1b03a6b Implement a system resources management routines 2024-05-16 23:08:59 +02:00
belliash 9f1a4f0ced Compose the AMD family and model IDs according to the AMD CPUID manual, section 2 2024-05-14 19:39:07 +02:00
belliash 2a8cc7397e Implement ArGetCpuFlags() routine 2024-05-14 16:26:02 +02:00
belliash 01d127f49e Consider not initialized list as empty, what prevents page faults 2024-05-14 15:53:21 +02:00
belliash 60a9e4b534 Rename source file with fb-related stuff, fix build 2024-05-13 15:59:24 +02:00
belliash 086d9ed7e2 Rename source file with fb-related stuff 2024-05-13 15:55:39 +02:00
belliash 78424385fc Convert RGB colors to FrameBuffer format 2024-05-13 08:51:27 +02:00
belliash e311cad8f7 Allow to clear framebuffer screen with any, custom background color 2024-05-12 22:43:06 +02:00
belliash 3d08be4fac Refactor kernel startup code 2024-05-12 09:06:24 +02:00
belliash eeeb9d6ed7 Update PoInitializeProcessorControlBlock() routine and corresponding structures 2024-05-09 22:12:50 +02:00
belliash c34b6ff6c1 Take CPU number from processor block 2024-05-08 21:59:18 +02:00
belliash 38b0b2ac7d Use correct stack when using preallocated processor structures 2024-05-08 15:57:24 +02:00
belliash 3c3a756771 Allow to initialize CPU with allocated processor structures 2024-05-08 00:02:47 +02:00
belliash fb099a1988 Preallocate buffer for all supported CPUs 2024-05-07 23:47:58 +02:00
belliash b65ff2a767 Implement MmAllocateProcessorStructures() routine as a temporary hack to get a buffer for AP initialization 2024-05-07 23:30:11 +02:00
belliash 8d6d27651c Implement KeGetCurrentProcessorNumber() routine 2024-05-07 18:52:43 +02:00
belliash f66e9aea9e Store CPU number and mask interrupts in processor block 2024-05-07 16:21:38 +02:00
belliash ac0b8ab36a Allow to specify CPU number when initializing (A)PIC 2024-05-07 16:16:49 +02:00
belliash 2c384d780f Fix storing CPU vendor name in PRCB 2024-05-06 20:01:19 +02:00
belliash 243aacc9c1 Cleanup thread context initialization code 2024-05-06 16:57:29 +02:00
belliash cf0d23b6fe Correct a typo causing page fault during int handling after switching to new kernel stack 2024-05-06 16:47:12 +02:00
belliash e4155ee008 Lower runlevel to APC before initializing idle process 2024-05-05 21:48:58 +02:00
belliash c98ad3862b Use kernel boot stack for the idle thread 2024-05-05 21:47:48 +02:00
belliash 40e0dd8c5e Mask LVTERR first to prevent local APIC errors 2024-05-05 15:24:17 +02:00
belliash a6b8f97fbb Remove empty line 2024-04-29 08:40:07 +02:00
belliash 22693a48d3 Rework trap handling assembly code 2024-04-23 15:07:08 +02:00
belliash 30a2cb9849 Update timers support 2024-04-21 13:57:55 +02:00
belliash 331c5bfeda Rework initial timer support 2024-04-20 23:15:57 +02:00
belliash 12ce7aae3f Correct formatting 2024-04-19 23:59:21 +02:00
belliash 9f2279f28f Use common way of setting initial runlevel across architectures 2024-04-19 23:56:33 +02:00
belliash 5539d98572 Raise to HIGH runlevel before switching the stack 2024-04-19 23:55:26 +02:00
belliash 3aa0413756 Use common routine to set runlevel 2024-04-19 23:52:21 +02:00
belliash 28c89986fb Tweaks to AMD64 architecture support 2024-04-19 23:37:39 +02:00
belliash b30d15719c Temporarily comment out thread code related to trap frame 2024-04-19 16:59:57 +02:00
belliash 51df6c3acb Update trap handler to allow access to the registers 2024-04-19 16:54:55 +02:00
belliash 92ee74b494 Rework trap handling to access registers 2024-04-19 16:52:37 +02:00
belliash cf408519ad Initialize AMD64 segments properly 2024-04-17 20:02:27 +02:00
belliash 8aa33874ff Initialize CS segment on i686 architecture 2024-04-17 18:27:57 +02:00
belliash 7011d456e9 Fix loading CS segment for AMD64 architecture 2024-04-17 16:48:18 +02:00
belliash b31aa82872 Fix loading CS segment for i686 architecture 2024-04-17 16:46:03 +02:00
belliash 7193e698f1 Store page map level 2024-04-07 17:49:24 +02:00
belliash 7c9233c9a2 Copy memory descriptor to fix i686 compiler error 2024-04-07 10:51:14 +02:00