71 Commits

Author	SHA1	Message	Date
Aiken Harris	049c9c6bbd	Update SelfMapAddress	2025-12-17 20:35:28 +01:00
Aiken Harris	f1a76bc01a	Call page table initialization	2025-12-16 22:34:41 +01:00
Aiken Harris	cb4d113e31	Add virtual address validation and system PTE helpers	2025-12-16 22:31:15 +01:00
Aiken Harris	728241f998	Move memory layout initialization to architecture-specific code	2025-12-16 20:36:16 +01:00
Aiken Harris	00d428d8de	Architecture-specific system PTE limits	2025-12-16 20:05:51 +01:00
Aiken Harris	020b7c7676	Extend memory layout	2025-12-16 18:37:28 +01:00
Aiken Harris	dc23f91110	Split PTE implementation per architecture	2025-12-16 14:08:32 +01:00
Aiken Harris	7f0ca6a948	Compute PTE count per page from entry size	2025-12-15 13:56:39 +01:00
Aiken Harris	36c273ea13	Implement early page table mapping routines	2025-12-15 13:24:02 +01:00
Aiken Harris	5cf3dfa844	Add bootstrap physical page allocator	2025-12-15 12:38:08 +01:00
Aiken Harris	070c508e42	Introduce kernel virtual memory layout	2025-12-14 15:35:24 +01:00
Aiken Harris	5224dc315f	Compute PFN database size during MM initialization	2025-12-13 22:50:27 +01:00
Aiken Harris	b7bbf9ffa8	Tidy up memory type verification helpers	2025-12-13 21:04:55 +01:00
Aiken Harris	eae48320f3	Harden PFN initialization and expose page count	2025-12-13 21:01:13 +01:00
Aiken Harris	17b5649362	Make memory type verification helpers accessible to PFN	2025-12-13 20:50:32 +01:00
Aiken Harris	783a9eea3a	Extract PFN management into separate module	2025-12-13 20:42:48 +01:00
Aiken Harris	237f6a2974	Refactor memory manager initialization into MM::Manager	2025-12-13 20:21:08 +01:00
Aiken Harris	ee9514fd5c	Fix GetP5eAddress return type	2025-12-13 19:58:49 +01:00
Aiken Harris	7694df7744	Add architecture-specific GetPteDistance	2025-12-06 00:19:24 +01:00
Aiken Harris	c710ec4688	Refactor XPA detection API	2025-12-04 23:07:59 +01:00
Aiken Harris	8054bb915a	Fix incorrect pointer types	2025-11-30 20:06:51 +01:00
Aiken Harris	4a7494ad3f	Split paging interface into arch-specific code	2025-11-30 19:19:32 +01:00
Aiken Harris	d4287198b0	Implement virtual address resolvers for all page map levels and add XPA status accessor	2025-11-30 18:23:51 +01:00
Aiken Harris	4265ae92d0	Add MM::PageMap::GetXpaStatus() for querying PML level	2025-11-29 23:45:00 +01:00
Aiken Harris	931586eebd	Refactor PageMap to enable architecture-specific VA translation	2025-11-29 23:37:08 +01:00
Aiken Harris	0cf178a648	Fix class name	2025-11-04 23:10:02 +01:00
Aiken Harris	66f27e4b9a	Add GetPageFrameNumber() to PTE interfaces	2025-11-04 23:03:47 +01:00
Aiken Harris	071c840ca8	Replace writable flag with AttributesMask in PTE setup	2025-11-04 17:34:49 +01:00
Aiken Harris	cb2da54956	Unify PTE pointer types across MM subsystem	2025-11-03 22:13:32 +01:00
Aiken Harris	c28c3f8344	Add input qualifiers to page map interface definitions	2025-11-03 20:04:21 +01:00
Aiken Harris	dfb0284427	Add input qualifiers to paging interface definitions	2025-11-03 16:00:46 +01:00
Aiken Harris	1150b9ecdb	Add PTE management routines	2025-10-30 22:03:25 +01:00
Aiken Harris	ffa480d69a	Implement unified PTE accessors and management helpers	2025-10-30 20:14:02 +01:00
Aiken Harris	72b92f853e	Use PTE base from PageMapInfo	2025-10-23 08:54:57 +02:00
Aiken Harris	6e10089280	Drop unnecessary boolean casts after type refactor	2025-09-23 19:17:33 +02:00
Aiken Harris	fabf3a3a5e	Replace all occurrences of NULL with NULLPTR for unified C and C++ null pointer handling	2025-09-16 15:59:56 +02:00
Aiken Harris	f4561c1f4f	Remove leftover old headers and fix missed spots	2025-09-16 08:46:53 +02:00
Aiken Harris	0a0fdffc46	Clean up kernel headers	2025-09-15 22:46:57 +02:00
Aiken Harris	404595801d	Migrate MM subsystem to C++	2025-09-15 22:15:07 +02:00
Aiken Harris	4947f788d5	Migrate KE subsystem to C++	2025-09-09 23:20:50 +02:00
Aiken Harris	c409400cbf	Correct VA masking in AMD64 page mapping functions	2025-08-18 01:07:28 +02:00
Aiken Harris	017b8603d5	Align parameters in PTE manipulation functions	2025-08-17 21:55:21 +02:00
Aiken Harris	a9dd1eaacd	Implement MmpSetPteCaching function for AMD64 architecture	2025-08-17 21:51:43 +02:00
Aiken Harris	f30d3df5b3	Implement PTE manipulation functions for AMD64 architecture	2025-08-17 21:48:28 +02:00
Aiken Harris	1e11acee72	Refactor hardware memory mapping to use page map routine callbacks	2025-08-17 00:47:56 +02:00
Aiken Harris	57193eecc0	Implement PML2/PML3 page table routines	2025-08-17 00:45:12 +02:00
Aiken Harris	720d525b95	Assign page map routines	2025-08-17 00:29:28 +02:00
Aiken Harris	f77f2bbf92	Introduce architecture-specific page map routines	2025-08-17 00:23:19 +02:00
Aiken Harris	0ed59f223c	Relocate page mapping helpers and add PML5 support	2025-08-16 21:07:54 +02:00
Aiken Harris	de2973ac42	Implement page map info initialization	2025-08-16 20:28:05 +02:00