5 Commits

Author	SHA1	Message	Date
belliash	0572b208f1	Add full paging support for AMD64 and i686 architectures, including PAE support	2022-12-11 20:14:04 +01:00
belliash	324a88cc01	Implement HlCpuId() routine and corresponding structures for issueing CPUID instruction	2022-12-11 17:40:56 +01:00
belliash	93fa2aed67	Implement BlMapVirtualMemory() routine for recursive mapping	2022-12-06 23:32:31 +01:00
belliash	b89121fded	Implement routines for accessing and manipulating CPU control registers	2022-12-02 23:03:42 +01:00
belliash	35f2c67138	Basic XT structures	2022-07-29 16:31:59 +02:00