76 커밋

Include renames

작성자	SHA1	메시지	날짜
harraiken	f9cbe78f84	Implement architecture-specific user probe address retrieval	2026-06-30 21:41:08 +02:00
harraiken	f2168e8c55	Update queued spinlock guard naming	2026-06-25 18:54:44 +02:00
harraiken	72a03f641d	Update doxygen comments and formatting	2026-05-20 20:52:52 +02:00
harraiken	19092eda2e	Rename architecture CPU functions class	2026-05-19 06:45:48 +02:00
harraiken	58981e0087	Add MapVirtualAddress to memory manager paging interface	2026-05-13 09:58:13 +02:00
harraiken	afb20a1796	Decouple pool initialization and validation from allocation logic	2026-03-18 20:31:06 +01:00
harraiken	42525e5993	Unify PTE type definitions across architectures	2026-03-15 20:23:44 +01:00
harraiken	5a9b7c0258	Implement canonical address validation routine	2026-03-04 14:15:33 +01:00
harraiken	511dd15c0c	Implement page allocation interface	2026-02-26 13:42:58 +01:00
harraiken	f7b7b61ea4	Add interface to retrieve page map level (PML)	2026-02-11 20:23:24 +01:00
harraiken	9a5ef6fc00	Map PDE and PTE ranges for i686 non-paged pool	2026-02-07 20:01:17 +01:00
harraiken	2e0e085acb	Minor style fixes	2026-02-06 20:52:59 +01:00
harraiken	0ce2741e18	Deduplicate PFN descriptor processing logic across architectures	2026-02-06 09:08:59 +01:00
harraiken	b51f21f55c	Introduce page directory initialization helper	2026-02-06 00:20:01 +01:00
harraiken	7b6e284d39	Refactor PFN database initialization loop on i686	2026-02-03 22:28:17 +01:00
harraiken	b16dbb19f8	Centralize memory layout dumping	2026-01-30 18:47:46 +01:00
harraiken	19f5307be6	Handle non-paged pool overflow	2026-01-30 18:38:54 +01:00
harraiken	825de8b471	Remove redundant PFN database alignment	2026-01-30 17:46:20 +01:00
harraiken	6a7bc64ac7	Overhaul kernel memory layout initialization and pool sizing	2026-01-30 14:47:13 +01:00
harraiken	54e75c9345	Fix PFN database size calculation call sites	2026-01-29 22:29:02 +01:00
harraiken	5e3fb7a5a3	Move PFN database size tracking to memory layout	2026-01-29 22:26:31 +01:00
harraiken	58669d3074	Refactor memory layout structure	2026-01-29 22:10:26 +01:00
harraiken	7f6114f8e5	Add skeleton for memory pool allocator	2026-01-29 20:00:09 +01:00
harraiken	d3edfef53b	Fix broken PPE check on i686	2026-01-19 11:16:59 +01:00
harraiken	c3607ea943	Add missing annotations	2026-01-14 22:48:25 +01:00
harraiken	7da6bcc75e	Standardize ValidPte setup across architectures	2026-01-14 22:42:14 +01:00
harraiken	b91c79e090	Prevent adding referenced pages to the free list	2026-01-06 15:01:05 +01:00
harraiken	bee91d0c71	Correctly setup PFN database for ROM and in-use pages	2026-01-06 14:49:30 +01:00
harraiken	36e53bfc8c	Ensure every page in a bad memory region is marked as bad	2026-01-06 14:05:09 +01:00
harraiken	9027632c4f	Make memory descriptor processing architecture-dependent	2026-01-05 23:39:42 +01:00
harraiken	455349f2d7	Remove dead code from paging and PTE management	2026-01-03 23:27:24 +01:00
harraiken	5e5b4a8392	Initialize system PTEs with arch-specific list terminator	2026-01-03 21:11:29 +01:00
harraiken	329143b4f6	Abstract PTE list terminator into paging layer	2026-01-03 21:03:14 +01:00
harraiken	cc76ea40ee	Add support for transitioning PTE to invalid state	2026-01-03 00:41:56 +01:00
harraiken	c080f74714	Introduce helper functions for querying the software prototype and transition bits of PTE	2026-01-01 19:40:23 +01:00
harraiken	dbda6bbb29	Initialize PTE template dynamically to resolve build warnings	2025-12-29 23:49:29 +01:00
harraiken	0d2d41dcda	Introduce page fault handling infrastructure	2025-12-29 14:53:43 +01:00
harraiken	7cb3d1764b	Initialize paged pool sizing logic	2025-12-29 10:28:12 +01:00
harraiken	04599161da	Refactor memory clearing calls and cleanup code style	2025-12-28 23:36:20 +01:00
harraiken	0880a0f344	Implement PFN database initialization and memory descriptor processing	2025-12-28 23:25:07 +01:00
harraiken	f0a06db7d2	Bring up i686 page table initialization	2025-12-22 23:48:04 +01:00
harraiken	643fd0d1e8	Fix PTE free list sentinel handling	2025-12-22 15:00:14 +01:00
harraiken	e237a944cc	Extend PTE helpers with raw read and write support	2025-12-22 08:21:43 +01:00
harraiken	755a167f2c	Respect architecture-specific PTE layouts and write PTEs via PML-aware helpers	2025-12-22 00:07:48 +01:00
harraiken	24dccf4bed	Make PPE mapping architecture-specific	2025-12-19 20:25:43 +01:00
harraiken	570301bb35	Clarify page table entry offset semantics	2025-12-18 22:38:59 +01:00
harraiken	b183d52806	Fix paging abstraction for PDE/PTE virtual address calculation	2025-12-18 22:26:31 +01:00
harraiken	687c58d923	Implement initial virtual memory layout setup	2025-12-17 22:28:08 +01:00
harraiken	049c9c6bbd	Update SelfMapAddress	2025-12-17 20:35:28 +01:00
harraiken	cb4d113e31	Add virtual address validation and system PTE helpers	2025-12-16 22:31:15 +01:00