perikiyoxd/exectos
1
0
Fork 0
forked from xt-sys/exectos
Code Pull Requests Activity
782 Commits 5 Branches 0 Tags
363e100493ab744561021ac6ba23c73ec011b3c7
Commit Graph
286 Commits
Author SHA1 Message Date
perikiyoxd 363e100493 Saving processor features in the processor control block 
Fixed correct AMD Family 25 model detection
Fixed procedure for saving processor vendor name (previously corrupted)
Added a debugging print of the processor identification
 2024-05-06 17:55:37 +02:00
belliash 243aacc9c1 Cleanup thread context initialization code 2024-05-06 16:57:29 +02:00
belliash cf0d23b6fe Correct a typo causing page fault during int handling after switching to new kernel stack 2024-05-06 16:47:12 +02:00
belliash e4155ee008 Lower runlevel to APC before initializing idle process 2024-05-05 21:48:58 +02:00
belliash c98ad3862b Use kernel boot stack for the idle thread 2024-05-05 21:47:48 +02:00
belliash 40e0dd8c5e Mask LVTERR first to prevent local APIC errors 2024-05-05 15:24:17 +02:00
belliash a6b8f97fbb Remove empty line 2024-04-29 08:40:07 +02:00
belliash 22693a48d3 Rework trap handling assembly code 2024-04-23 15:07:08 +02:00
belliash 30a2cb9849 Update timers support 2024-04-21 13:57:55 +02:00
belliash 331c5bfeda Rework initial timer support 2024-04-20 23:15:57 +02:00
belliash 12ce7aae3f Correct formatting 2024-04-19 23:59:21 +02:00
belliash 9f2279f28f Use common way of setting initial runlevel across architectures 2024-04-19 23:56:33 +02:00
belliash 5539d98572 Raise to HIGH runlevel before switching the stack 2024-04-19 23:55:26 +02:00
belliash 3aa0413756 Use common routine to set runlevel 2024-04-19 23:52:21 +02:00
belliash 28c89986fb Tweaks to AMD64 architecture support 2024-04-19 23:37:39 +02:00
belliash b30d15719c Temporarily comment out thread code related to trap frame 2024-04-19 16:59:57 +02:00
belliash 51df6c3acb Update trap handler to allow access to the registers 2024-04-19 16:54:55 +02:00
belliash 92ee74b494 Rework trap handling to access registers 2024-04-19 16:52:37 +02:00
belliash cf408519ad Initialize AMD64 segments properly 2024-04-17 20:02:27 +02:00
belliash 8aa33874ff Initialize CS segment on i686 architecture 2024-04-17 18:27:57 +02:00
belliash 7011d456e9 Fix loading CS segment for AMD64 architecture 2024-04-17 16:48:18 +02:00
belliash b31aa82872 Fix loading CS segment for i686 architecture 2024-04-17 16:46:03 +02:00
belliash 7193e698f1 Store page map level 2024-04-07 17:49:24 +02:00
belliash 7c9233c9a2 Copy memory descriptor to fix i686 compiler error 2024-04-07 10:51:14 +02:00
belliash e82c3cbf18 Fix function prototypes 2024-04-07 10:37:27 +02:00
belliash cf8bac9fbe Initial memory manager initialization code 2024-04-07 10:27:30 +02:00
belliash 04e22c127e Initial memory manager initialization code 2024-04-07 10:26:12 +02:00
belliash 74b2c80869 RtlCountLeadingZeroes64() should take 64bit value 2024-03-23 00:36:59 +01:00
belliash 9aff665d1a Export RtlClearSetBits(), RtlFindClearBits(), RtlFindSetBits() and RtlSetClearBits() routines 2024-03-22 22:49:12 +01:00
belliash 715f842445 Implement RtlClearSetBits(), RtlFindClearBits(), RtlFindSetBits() and RtlSetClearBits() routines 2024-03-22 18:53:30 +01:00
belliash 7895cb0d32 Fix RtlClearBits() and RtlSetBits() 2024-03-21 21:36:33 +01:00
belliash b6f915c0c5 Implement RtlClearBits() and RtlSetBits() routines 2024-03-19 19:53:49 +01:00
belliash 26d5118cea Add forward references to bit map related routines 2024-03-12 22:02:24 +01:00
belliash 067a8bbade Export bit map related routines 2024-03-12 19:31:32 +01:00
belliash c3831f82e7 Initial bit maps support 2024-03-12 19:15:02 +01:00
belliash 3a86ab1424 Remove duplicated code 2024-03-10 22:51:34 +01:00
belliash bb44caee31 Implement HlPutCharacter() routine 2024-03-10 17:02:30 +01:00
belliash cb4292dccf Allow to use custom framebuffer fonts 2024-03-10 10:02:30 +01:00
belliash a4d9e6dd8e Optimize HlClearScreen() routine 2024-03-09 15:50:05 +01:00
belliash a4c22ab5e8 Improvements to FrameBuffer support 2024-03-09 15:07:33 +01:00
belliash f9714a79e4 Add support for writing floating point values 2024-02-22 23:39:11 +01:00
belliash 0c7cf6f6d3 Implement RtlInfiniteDouble() and RtlNanDouble() routines 2024-02-21 19:55:16 +01:00
belliash 4b2d8ded72 No parameters are expected, explicitly 2024-02-20 16:55:12 +01:00
belliash c70d2e2afa Routines with no prototype cannot use XTAPI calling convention 2024-02-20 16:37:57 +01:00
belliash 83a976dd3a Implement RtlCopyString() and RtlCopyWideString() routines 2024-02-20 16:25:16 +01:00
belliash 015faa53a0 XTAPI calling convention is not supported on variadic routines 2024-02-20 16:21:28 +01:00
belliash e409675f98 Always use RtlSetMemory() to fill a buffer with a specified pattern 2024-02-20 16:16:32 +01:00
belliash 477e56e294 Move RtlFillMemory() routine to ntosdrv driver 2024-02-20 16:08:10 +01:00
belliash 246968045a Use flags instead of dozen variables 2024-02-18 13:37:17 +01:00
belliash 2dd4048416 Switch GUID specifier to %v and %V, thus allowing to write string with both lower and uppercase 2024-02-17 22:52:49 +01:00