Commit Graph
70 Commits
Author SHA1 Message Date
belliash f81e895fe1 Add MBR boot code 2025-09-27 14:07:17 +02:00
harraiken c041457799 Refactor bootloader code into C++ classes 2025-09-20 18:47:36 +02:00
harraiken 08a9a0273f Move trampoline handling code 2025-09-19 19:32:04 +02:00
harraiken 7b357ebc54 Fix build after migration 2025-09-19 13:41:05 +02:00
harraiken e7425de523 Drop C wrappers and switch to C++ API 2025-09-19 12:56:06 +02:00
harraiken 9bbac6d3c1 Migrate XTOS module to C++ 2025-09-18 21:54:11 +02:00
harraiken fabf3a3a5e Replace all occurrences of NULL with NULLPTR for unified C and C++ null pointer handling 2025-09-16 15:59:56 +02:00
harraiken 9577a39046 Fix initialization block size calculation to account for variable-length kernel parameters 2025-09-03 18:10:42 +02:00
harraiken 1ef2560ef6 Enable LA57 by invoking the trampoline code 2025-08-21 00:14:49 +02:00
harraiken 88b3a57962 Allow specifying an allocation type when allocating pages 2025-08-20 20:59:31 +02:00
harraiken 91a5db2ee4 Implement PML5 support in XtpMapHardwareMemoryPool 2025-08-18 12:13:48 +02:00
harraiken d602038858 Temporarily disable LA57 paging 2025-08-18 00:10:32 +02:00
harraiken c3ece4f317 Fix type usage in XtpMapHardwareMemoryPool 2025-08-17 00:51:26 +02:00
harraiken 8491e5fed1 Remove PageMapLevel from the loader information block 2025-08-16 20:18:34 +02:00
harraiken 3ca6d04f6b Add definitions for 5-level paging and refactor constants 2025-08-16 00:22:21 +02:00
harraiken 2375a653fe Resolve potential PDE conflict in non-PAE boot path 2025-08-11 20:59:00 +02:00
harraiken bf291613a3 Add debug messages to display PML set by bootloader 2025-08-10 18:07:26 +02:00
harraiken 383d5eeb06 Add missing forward declaration to resolve compile issue 2025-08-10 17:43:27 +02:00
harraiken dce2c50b9d Replace hardcoded PML level with dynamic detection using XtpDeterminePagingLevel 2025-08-10 17:39:38 +02:00
harraiken a33a45fc20 Implement paging level detection for AMD64 based on CPUID and boot parameters 2025-08-10 17:27:12 +02:00
harraiken 23e8be1097 Remove PAE support check to allow both PAE and non-PAE configurations 2025-08-10 17:25:04 +02:00
harraiken 800810169d Fix XtpDeterminePagingLevel after renaming CPUID requests 2025-08-10 17:19:44 +02:00
harraiken a539191a33 Implement paging level detection for i686 based on CPUID and boot parameters 2025-08-10 15:42:41 +02:00
harraiken 2472cbbff4 Revert 'Simplify and correct hardware pool mapping' 2025-08-09 17:15:35 +02:00
harraiken 311d5e1f5c Simplify and correct hardware pool mapping 2025-08-08 21:49:21 +02:00
harraiken ca6c913fa7 Clarify PAE state management logic 2025-08-02 18:30:23 +02:00
harraiken ca06f9ebb5 Correctly manage PAE state when enabling paging 2025-08-02 18:26:01 +02:00
harraiken e6ebac7cda Correct status variable type in XtpMapHardwareMemoryPool 2025-07-30 21:50:36 +02:00
harraiken 4453b95f5c Correct status variable type in XtpMapHardwareMemoryPool 2025-07-30 21:48:38 +02:00
harraiken 66e136c7d6 Enable paging 2025-07-30 16:58:25 +02:00
harraiken d61b48740f Declare CpuRegisters as a local structure instead of a pointer 2025-07-30 16:53:07 +02:00
harraiken 3607a6d930 Zero-initialize Page Directory entries before use 2025-07-30 16:49:49 +02:00
harraiken ecaf923e6d Ensure correct boot volume is used to boot XTOS 2025-07-29 08:01:32 +02:00
belliash 7f922dd864 Let XTLDR provide ACPI system resource 2024-06-02 22:30:52 +02:00
belliash 29ff9e114e Mark XtMapHardwareMemoryPool() routine private 2024-06-02 17:34:30 +02:00
belliash c1ab5fe98d Cleanup hardware allocation memory pool related code for i686 2024-06-02 17:32:39 +02:00
belliash 6176ca38a8 Cleanup hardware allocation memory pool related code 2024-06-02 17:29:31 +02:00
belliash f968eb21fd Cleanup the code 2024-05-27 22:20:53 +02:00
belliash 7f8846f23d Map memory for hardware layer on i686 2024-05-27 22:17:30 +02:00
belliash ae243a9d07 Map memory for hardware layer on amd64 2024-05-27 21:54:21 +02:00
belliash 5221db2e63 Rename LOADER_MEMORY_MAPPING structure to more meaningful LOADER_MEMORY_DESCRIPTOR 2024-05-23 19:00:50 +02:00
belliash 34cc81c446 Provide framebuffer information via system resource 2024-05-18 17:06:44 +02:00
belliash c576f7f8f2 Provide pixel information to the kernel 2024-05-12 22:28:06 +02:00
belliash 7193e698f1 Store page map level 2024-04-07 17:49:24 +02:00
belliash 388ac1a8c2 Properly, recursively self map page tables on i686 architecture 2024-04-07 17:11:14 +02:00
belliash 1305672875 Properly, recursively self map page tables; currently only for AMD64 and PML4 2024-04-05 00:26:41 +02:00
belliash 713f826387 XTOS boot protocol should use builtin mapping function 2024-03-17 23:10:50 +01:00
belliash 41ebabcb09 Provide only necessary framebuffer information to the kernel 2024-03-15 16:46:53 +01:00
belliash 945b323606 Initialize framebuffer earlier and reset video screen mode to circumvent buggy firmwares 2024-03-15 15:46:45 +01:00
belliash 848731c9e6 Introduce ability to change screen resolution 2024-03-15 15:12:12 +01:00