528 Commits

Author	SHA1	Message	Date
Aiken Harris	c080f74714	Introduce helper functions for querying the software prototype and transition bits of PTE	2026-01-01 19:40:23 +01:00
Aiken Harris	5ff0cad094	Introduce per-page-color modified page lists	2026-01-01 16:54:26 +01:00
Aiken Harris	00702bfb23	Remove redundant check for invisible memory regions	2025-12-30 13:10:32 +01:00
Aiken Harris	dbda6bbb29	Initialize PTE template dynamically to resolve build warnings	2025-12-29 23:49:29 +01:00
Aiken Harris	aced62e790	Prevent initialization of invisible memory ranges	2025-12-29 19:27:30 +01:00
Aiken Harris	53116b86a3	Improve formatting	2025-12-29 19:19:45 +01:00
Aiken Harris	d8fc223140	Adjust thread initialization to match new stack allocator signature	2025-12-29 19:16:13 +01:00
Aiken Harris	f4c49e2f25	Simplify stack page count calculation	2025-12-29 19:14:49 +01:00
Aiken Harris	4c7c914a1c	Implement kernel stack allocation logic	2025-12-29 19:10:25 +01:00
Aiken Harris	4a00179af2	Implement logic to link physical pages to PTEs	2025-12-29 18:31:16 +01:00
Aiken Harris	0d2d41dcda	Introduce page fault handling infrastructure	2025-12-29 14:53:43 +01:00
Aiken Harris	49e97fb8b4	Reserve space for color tables to fix invalid memory access	2025-12-29 13:17:41 +01:00
Aiken Harris	7cb3d1764b	Initialize paged pool sizing logic	2025-12-29 10:28:12 +01:00
Aiken Harris	200e9132b1	Minor style fixes in MM includes	2025-12-28 23:51:34 +01:00
Aiken Harris	d891088b1a	Update PTE support to use safe write accessors	2025-12-28 23:39:08 +01:00
Aiken Harris	04599161da	Refactor memory clearing calls and cleanup code style	2025-12-28 23:36:20 +01:00
Aiken Harris	0880a0f344	Implement PFN database initialization and memory descriptor processing	2025-12-28 23:25:07 +01:00
Aiken Harris	4593a89a9b	Expose PFN database lookup via GetPfnEntry	2025-12-28 21:18:17 +01:00
Aiken Harris	b7c004528a	Implement tracking of available physical pages	2025-12-23 22:13:09 +01:00
Aiken Harris	5012c8dc37	Initialize system PTE pools and implement reservation routines	2025-12-23 20:16:08 +01:00
Aiken Harris	1e3917882c	Initialize system page tables and configure kernel mappings	2025-12-23 18:03:02 +01:00
Aiken Harris	b3b874d3ce	Include mm/colors.cc in kernel build configuration	2025-12-23 14:29:26 +01:00
Aiken Harris	288b2f8b24	Introduce page coloring support to memory manager	2025-12-23 14:27:12 +01:00
Aiken Harris	c7cc536685	Add storage for PFN database size	2025-12-23 14:13:33 +01:00
Aiken Harris	b8e81e2223	Initialize memory manager during kernel startup	2025-12-23 14:05:07 +01:00
Aiken Harris	f0a06db7d2	Bring up i686 page table initialization	2025-12-22 23:48:04 +01:00
Aiken Harris	7575526f07	Fix physical page count overflow by using 64-bit type	2025-12-22 23:32:54 +01:00
Aiken Harris	643fd0d1e8	Fix PTE free list sentinel handling	2025-12-22 15:00:14 +01:00
Aiken Harris	e237a944cc	Extend PTE helpers with raw read and write support	2025-12-22 08:21:43 +01:00
Aiken Harris	755a167f2c	Respect architecture-specific PTE layouts and write PTEs via PML-aware helpers	2025-12-22 00:07:48 +01:00
Aiken Harris	24dccf4bed	Make PPE mapping architecture-specific	2025-12-19 20:25:43 +01:00
Aiken Harris	7b93c39348	Add early spin lock initialization	2025-12-19 19:12:50 +01:00
Aiken Harris	570301bb35	Clarify page table entry offset semantics	2025-12-18 22:38:59 +01:00
Aiken Harris	b183d52806	Fix paging abstraction for PDE/PTE virtual address calculation	2025-12-18 22:26:31 +01:00
Aiken Harris	687c58d923	Implement initial virtual memory layout setup	2025-12-17 22:28:08 +01:00
Aiken Harris	049c9c6bbd	Update SelfMapAddress	2025-12-17 20:35:28 +01:00
Aiken Harris	f1a76bc01a	Call page table initialization	2025-12-16 22:34:41 +01:00
Aiken Harris	cb4d113e31	Add virtual address validation and system PTE helpers	2025-12-16 22:31:15 +01:00
Aiken Harris	728241f998	Move memory layout initialization to architecture-specific code	2025-12-16 20:36:16 +01:00
Aiken Harris	00d428d8de	Architecture-specific system PTE limits	2025-12-16 20:05:51 +01:00
Aiken Harris	020b7c7676	Extend memory layout	2025-12-16 18:37:28 +01:00
Aiken Harris	2265a4a522	Remove unsupported PML4/PML5 PTE interfaces	2025-12-16 14:13:55 +01:00
Aiken Harris	dc23f91110	Split PTE implementation per architecture	2025-12-16 14:08:32 +01:00
Aiken Harris	7f0ca6a948	Compute PTE count per page from entry size	2025-12-15 13:56:39 +01:00
Aiken Harris	36c273ea13	Implement early page table mapping routines	2025-12-15 13:24:02 +01:00
Aiken Harris	5cf3dfa844	Add bootstrap physical page allocator	2025-12-15 12:38:08 +01:00
Aiken Harris	070c508e42	Introduce kernel virtual memory layout	2025-12-14 15:35:24 +01:00
Aiken Harris	5224dc315f	Compute PFN database size during MM initialization	2025-12-13 22:50:27 +01:00
Aiken Harris	b7bbf9ffa8	Tidy up memory type verification helpers	2025-12-13 21:04:55 +01:00
Aiken Harris	eae48320f3	Harden PFN initialization and expose page count	2025-12-13 21:01:13 +01:00