Commit Graph

151 Commits

Author SHA1 Message Date
cec5e8b16b Implement detection of timer capabilities 2026-04-12 23:58:48 +02:00
7d8bfa8f0a Implement support for APIC Self-InterProcessor Interrupts (SIPI) 2026-04-09 20:25:55 +02:00
9ffb03217a Implement software interrupt dispatch table and secondary handler lookup 2026-04-08 20:13:35 +02:00
f1476912f3 Add definitions for PIT ports and APIC timer divisor configuration 2026-04-08 07:21:40 +02:00
87a91bfeb1 Make XTDK headers assembly-safe 2026-04-01 16:05:34 +02:00
38d49eece4 Add definition for the kernel compatibility mode code selector 2026-04-01 10:48:24 +02:00
e9aaeab982 Replace hardcoded stack count with architecture specific constant 2026-03-28 20:53:50 +01:00
a608b26fde Implement NMI stack handling via IST 2026-03-28 20:49:18 +01:00
944d5b5c0a Implement pool allocations and frees tracking 2026-03-23 18:54:18 +01:00
b83eaaa820 Add definitions for pool management structures 2026-03-21 19:10:58 +01:00
7a44901064 Add definition for guarded PTE flag and remove hardcoded value 2026-02-25 12:14:26 +01:00
2c8eb6d692 Remove unused kernel base address definition 2026-01-23 20:59:10 +01:00
0b1b76e9df Rollback bootloader memory management changes 2026-01-20 16:04:07 +01:00
0766eb4566 Drop obsolete KSEG0_KERNEL_BASE definition 2026-01-12 23:05:01 +01:00
455349f2d7 Remove dead code from paging and PTE management 2026-01-03 23:27:24 +01:00
560cd43b34 Update memory manager type definitions and constants 2025-12-23 12:04:43 +01:00
049c9c6bbd Update SelfMapAddress 2025-12-17 20:35:28 +01:00
00d428d8de Architecture-specific system PTE limits 2025-12-16 20:05:51 +01:00
7f0ca6a948 Compute PTE count per page from entry size 2025-12-15 13:56:39 +01:00
0097cb88d7 Correct LA57 paging base addresses, add self-map constants and extend PTE structures 2025-11-29 23:11:54 +01:00
dda8f88830 Add PTE attribute definitions 2025-11-04 17:26:47 +01:00
f6dac12057 Add missing EmptyPteList field to MMPAGEMAP_INFO 2025-10-30 20:19:35 +01:00
00b04f5405 Refactor IDT gate setup to use explicit DPL and type fields 2025-10-18 18:29:49 +02:00
2b49b23d41 Add trampoline support and move assembler prototypes 2025-09-19 19:07:27 +02:00
e7425de523 Drop C wrappers and switch to C++ API 2025-09-19 12:56:06 +02:00
0a0fdffc46 Clean up kernel headers 2025-09-15 22:46:57 +02:00
4592955da1 Migrate HL subsystem to C++ 2025-09-13 19:15:13 +02:00
c8dc2a1407 Migrate AR subsystem to C++ 2025-09-08 15:29:13 +02:00
6ee7243e04 Refactor APIC delivery mode handling and unify naming 2025-09-01 19:54:12 +02:00
d45cc5ffe5 Fix incorrect APIC delivery mode definitions 2025-09-01 19:32:29 +02:00
a84ef21571 Adjust LA57 base addresses to prevent overflow 2025-08-21 01:42:36 +02:00
9f6121e9b2 Map the physical page for trampoline code 2025-08-20 20:37:55 +02:00
4a7ea6009d Expose ArEnableExtendedPhysicalAddressing function in XTDK 2025-08-20 20:23:44 +02:00
ebae8c655c Expand CR4, MSR, and EFER register definitions 2025-08-19 23:59:58 +02:00
1a0bc7f65f Update and correct CR4 bit definitions 2025-08-19 21:45:13 +02:00
c409400cbf Correct VA masking in AMD64 page mapping functions 2025-08-18 01:07:28 +02:00
0ed59f223c Relocate page mapping helpers and add PML5 support 2025-08-16 21:07:54 +02:00
1dcd3fceed Define page map information structure for both supported architectures 2025-08-16 20:08:12 +02:00
3ca6d04f6b Add definitions for 5-level paging and refactor constants 2025-08-16 00:22:21 +02:00
e57985da8d Rename MM_LA57_SHIFT to MM_P5I_SHIFT for consistency 2025-08-15 20:49:25 +02:00
a431816243 Update CPUID requests 2025-08-10 16:52:59 +02:00
23f022965a Add forward declarations for CPUID feature enums 2025-08-10 16:35:40 +02:00
aef81760d0 Rename enumeration lists 2025-08-10 16:33:36 +02:00
69d4e0cd84 Add enums for CPU feature flags used in CPUID detection 2025-08-10 16:27:14 +02:00
7b8f4f15cc Add APIC Logical Destination Register (LDR) shifts and correct APIC delivery mode values 2024-07-23 20:14:06 +02:00
906e09fd9f Refactor COM port support, to get rid of global variables in library 2024-06-12 18:02:29 +02:00
86bc2042e5 Cleanup XTDK headers 2024-06-06 23:09:03 +02:00
92e861ebae Cleanup APIC related headers 2024-06-06 21:50:20 +02:00
4212453cf5 Fix APIC initialization code 2024-06-06 16:49:08 +02:00
ef65bceccd Initialize legacy PIC and mask all interrupts 2024-06-05 16:08:54 +02:00