57 Commits

Author	SHA1	Message	Date
Aiken Harris	efff262fb5	Replace CPUID queries with cached PRCB feature bits	2026-05-15 09:13:56 +02:00
Aiken Harris	757eac08c6	Refactor APIC IPI dispatching	2026-05-13 11:27:01 +02:00
Aiken Harris	5a92173586	Implement targeted IPI broadcasting using processor block array	2026-05-11 00:07:21 +02:00
Aiken Harris	6b14f31107	Enable HPET main counter and disable legacy replacement during hardware detection	2026-05-09 13:13:30 +02:00
Aiken Harris	976eee9ce3	Add HPET and TSC stall execution backends	2026-05-07 20:24:19 +02:00
Aiken Harris	689951cfde	Update timer subsystem with multi-backend dispatch table	2026-05-07 19:50:37 +02:00
Aiken Harris	c5b0d15830	Zero-initialize register before bitfield assignment	2026-05-06 19:58:17 +02:00
Aiken Harris	8107692d83	Enable allocated APIC interrupt and validate IO APIC mapping	2026-05-06 19:50:54 +02:00
Aiken Harris	3262ad78c1	Move timer initialization	2026-05-06 19:48:05 +02:00
Aiken Harris	7017985682	Register APIC error handler and stub broadcast IPI for uniprocessor	2026-05-03 13:12:29 +02:00
Aiken Harris	58deafb1d8	Add support for sending broadcast IPIs	2026-04-27 22:11:30 +02:00
Aiken Harris	8d58a7fcc1	Ensure consistent delivery mode for allocated system interrupts	2026-04-27 20:01:45 +02:00
Aiken Harris	13cf7b5fe7	Fix SendSelfIpi to write ICR1/ICR0 sequentially and validate vector in IRR	2026-04-27 20:00:22 +02:00
Aiken Harris	119679c996	Mask the APIC Timer	2026-04-26 22:14:07 +02:00
Aiken Harris	f2baa765b4	Use constants for CMOS port selection	2026-04-24 09:55:36 +02:00
Aiken Harris	2dd1fdf869	Implement RTC support	2026-04-24 09:52:07 +02:00
Aiken Harris	58010c27f4	Implement CMOS register access functions	2026-04-23 19:13:56 +02:00
Aiken Harris	cd4e905054	Add support for I/O APIC controllers and interrupt override handling	2026-04-18 00:04:12 +02:00
Aiken Harris	cec5e8b16b	Implement detection of timer capabilities	2026-04-12 23:58:48 +02:00
Aiken Harris	55cb12c978	Ensure APIC idle state before sending self-IPI	2026-04-09 23:51:13 +02:00
Aiken Harris	7d8bfa8f0a	Implement support for APIC Self-InterProcessor Interrupts (SIPI)	2026-04-09 20:25:55 +02:00
Aiken Harris	d00e96baa4	Invoke APIC timer initialization	2026-04-09 16:17:08 +02:00
Aiken Harris	17f044cb3f	Apply consistent coding style	2026-04-09 11:42:41 +02:00
Aiken Harris	1fa6e90439	Hook up profile interrupt handler	2026-04-08 23:16:03 +02:00
Aiken Harris	53c5946c04	Clean up APIC timer initialization	2026-04-08 20:23:37 +02:00
Aiken Harris	9ffb03217a	Implement software interrupt dispatch table and secondary handler lookup	2026-04-08 20:13:35 +02:00
Aiken Harris	adb591f8c7	Implement APIC timer initialization and calibration	2026-04-08 00:15:03 +02:00
Aiken Harris	2a24ce9a35	Refactor spurious interrupt handling to use assembly routine	2026-04-02 13:14:49 +02:00
Aiken Harris	64b5de98c8	Move IRQ handling from kernel executive to hardware layer	2026-03-27 12:00:09 +01:00
Aiken Harris	9479f3d364	Implement APIC presence check and panic if unsupported	2026-03-25 22:52:58 +01:00
Aiken Harris	b2c8fa3e62	Use new C++ API	2025-09-19 10:49:07 +02:00
Aiken Harris	f4561c1f4f	Remove leftover old headers and fix missed spots	2025-09-16 08:46:53 +02:00
Aiken Harris	4592955da1	Migrate HL subsystem to C++	2025-09-13 19:15:13 +02:00
Aiken Harris	3395934330	Match renamed I/O register helpers	2025-09-11 19:08:20 +02:00
Aiken Harris	6ee7243e04	Refactor APIC delivery mode handling and unify naming	2025-09-01 19:54:12 +02:00
Aiken Harris	3c8b7cb1f2	Remove unused variable	2025-09-01 19:25:45 +02:00
Aiken Harris	2e415f6ec2	Remove broadcast INIT IPI	2025-09-01 19:23:02 +02:00
Aiken Harris	84ac8f00e0	Fix APIC initialization and refine comments	2025-09-01 15:41:06 +02:00
Aiken Harris	a6814aa2a3	Resolve compilation errors due to renamed CPUID requests	2025-08-10 16:59:32 +02:00
Rafal Kupiec	2e7793dc2b	Implement HlpGetCpuApicId() routine	2024-07-22 23:31:20 +02:00
Rafal Kupiec	2c5b680426	Implement HlpSendIpi() routine	2024-07-22 23:23:55 +02:00
Rafal Kupiec	626ece8046	HlReadApicRegister() should return and HlWriteApicRegister() should take ULONGLONG value	2024-07-16 22:36:45 +02:00
Rafal Kupiec	f36b59c961	Store processor identities in system info structure	2024-06-07 20:19:56 +02:00
Rafal Kupiec	4212453cf5	Fix APIC initialization code	2024-06-06 16:49:08 +02:00
Rafal Kupiec	ef65bceccd	Initialize legacy PIC and mask all interrupts	2024-06-05 16:08:54 +02:00
Rafal Kupiec	b061c87fc9	Fix routines with no prototype using XTAPI calling convention compiler warnings	2024-06-04 21:41:16 +02:00
Rafal Kupiec	8a4caba26f	Fix routine with no prototype using XTAPI calling convention compiler warning	2024-06-04 21:39:10 +02:00
Rafal Kupiec	94a40501d4	Mask APIC ICR0 and disable APIC interrupts for initialization time by raising APIC TPR	2024-05-24 23:39:06 +02:00
Rafal Kupiec	c34b6ff6c1	Take CPU number from processor block	2024-05-08 21:59:18 +02:00
Rafal Kupiec	f66e9aea9e	Store CPU number and mask interrupts in processor block	2024-05-07 16:21:38 +02:00