Commit Graph

19 Commits

Author SHA1 Message Date
f4b189adef Fix incorrect descriptor type used for NMI TSS 2026-03-30 22:20:09 +02:00
40c4860548 Refine LDT setup and restore critical TSS fields for hardware exceptions 2026-03-30 20:29:43 +02:00
d2a7ae46ac Fix hardware task gate configuration 2026-03-30 20:16:44 +02:00
8a02a5aca3 Explicitly load GS and SS registers during segment initialization 2026-03-30 18:43:52 +02:00
96df5a80b8 Set CR3 field in TSS to ensure correct page table context on task switches 2026-03-30 14:56:41 +02:00
489ef8a514 Update IDT gate types for i686 exception handlers 2026-03-30 13:31:20 +02:00
8c6c63465f Use dedicated NMI stack on i686 2026-03-30 11:43:09 +02:00
32d3672a51 Generate distinct handlers for CPU traps and hardware interrupts 2026-03-27 20:42:41 +01:00
9c449bed43 Initialize IDT with specific trap handlers for each vector 2026-03-27 19:16:16 +01:00
00b04f5405 Refactor IDT gate setup to use explicit DPL and type fields 2025-10-18 18:29:49 +02:00
2b49b23d41 Add trampoline support and move assembler prototypes 2025-09-19 19:07:27 +02:00
1b0468f742 Fix build by replacing leftover Ar calls 2025-09-19 13:26:26 +02:00
fabf3a3a5e Replace all occurrences of NULL with NULLPTR for unified C and C++ null pointer handling 2025-09-16 15:59:56 +02:00
f4561c1f4f Remove leftover old headers and fix missed spots 2025-09-16 08:46:53 +02:00
ee97388981 Switch i686 processor structures setup to use class data 2025-09-15 22:50:52 +02:00
4592955da1 Migrate HL subsystem to C++ 2025-09-13 19:15:13 +02:00
3a11d536d5 Refactor AR subsystem 2025-09-11 20:23:51 +02:00
4947f788d5 Migrate KE subsystem to C++ 2025-09-09 23:20:50 +02:00
c8dc2a1407 Migrate AR subsystem to C++ 2025-09-08 15:29:13 +02:00