perikiyoxd/exectos
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Code Pull Requests Activity
1,656 Commits 5 Branches 0 Tags
f79c9023d8d4f667e2d3104e5fc4c844f55287ee
Commit Graph

142 Commits

Author SHA1 Message Date
Aiken Harris
cf0d7f0a40 Update trampoline size output parameter to PULONG across bootloader and kernel 2026-06-12 12:54:53 +02:00
Aiken Harris
663f5cd048 Drop obsolete IPI exception dispatch path 2026-06-08 20:55:17 +02:00
Aiken Harris
5999906bf0 Switch CPU exception IDT entries to interrupt gates to mask interrupts on entry 2026-06-08 20:46:51 +02:00
Aiken Harris
1e0c1490fb Remove redundant IDT gate initialization for vector 0xE1 2026-06-08 20:41:02 +02:00
Aiken Harris
a601fd0afa Mark BSP processor as started 2026-06-08 10:22:41 +02:00
Aiken Harris
34aba8c7c7 Remove software interrupt 0x2F trap handler 2026-06-03 15:57:12 +02:00
Aiken Harris
5e764a0d17 Fix IDT entry for vector 0x2F to use interrupt entry point 2026-06-03 15:43:11 +02:00
Aiken Harris
0aabc206a1 Add BSF and BSR instruction wrappers 2026-06-01 00:36:52 +02:00
Aiken Harris
9ac64605d3 Reserve initial thread frame space in AP startup stack 2026-05-22 18:59:43 +02:00
Aiken Harris
19092eda2e Rename architecture CPU functions class 2026-05-19 06:45:48 +02:00
Aiken Harris
b03cca65d8 Rename ProcSup class to ProcessorSupport and update all callers 2026-05-18 22:55:54 +02:00
Aiken Harris
7836dbe147 Fix parameter alignment and improve return value documentation 2026-05-18 22:37:36 +02:00
Aiken Harris
14cbd63b01 Remove premature SetRunLevel call from InitializeProcessor before APIC initialization 2026-05-14 21:52:42 +02:00
Aiken Harris
ed52d421ea Implement processor feature enumeration mapping 2026-05-14 21:35:43 +02:00
Aiken Harris
6df6a012d2 Partially revert ca4f3acc0e 2026-05-14 21:12:09 +02:00
Aiken Harris
ca4f3acc0e Properly identify CPU vendor 2026-05-14 18:59:00 +02:00
Aiken Harris
908bc87b06 Add NULL checks to InitializeProcessorStructures and reorder TSS allocation 2026-05-14 11:06:00 +02:00
Aiken Harris
6b852556a5 Replace magic numbers with architectural defines 2026-05-13 22:01:49 +02:00
Aiken Harris
ae18468bad Add AP startup assembly trampoline for AMD64 2026-05-13 21:48:42 +02:00
Aiken Harris
42bbdc9b26 Fix AP trampoline stack setup 2026-05-13 21:24:27 +02:00
Aiken Harris
b1ecdc3439 Add AP startup assembly trampoline for i686 2026-05-13 20:31:30 +02:00
Aiken Harris
a7151dbc89 Fix boot stack initialization by returning the highest address 2026-05-03 18:49:51 +02:00
Aiken Harris
98f2f449f9 Add wrapper for RDTSCP instruction 2026-04-22 22:58:17 +02:00
Aiken Harris
17f044cb3f Apply consistent coding style 2026-04-09 11:42:41 +02:00
Aiken Harris
9ffb03217a Implement software interrupt dispatch table and secondary handler lookup 2026-04-08 20:13:35 +02:00
Aiken Harris
4f65773aa9 Unify trap handler naming and remove unused kernel mode stack setup 2026-04-08 19:52:55 +02:00
Aiken Harris
a0d5ee17c2 Replace trap dispatch wrappers with direct symbol mapping 2026-04-07 12:56:33 +02:00
Rafal Kupiec
9935d2d26b Update CPU identification code 2026-04-06 21:17:58 +02:00
Aiken Harris
09516835d0 Consolidate boot and architecture support code into a single assembly file 2026-04-02 15:08:12 +02:00
Aiken Harris
9ea79c92a6 Refactor assembly includes and delete manual offset definitions 2026-04-02 10:50:00 +02:00
Aiken Harris
87a91bfeb1 Make XTDK headers assembly-safe 2026-04-01 16:05:34 +02:00
Aiken Harris
232b92fd7e Implement spurious interrupt handler 2026-04-01 13:03:46 +02:00
Aiken Harris
d88f9f0a15 Remove erroneous swapgs and implement proper segment setting 2026-04-01 11:18:28 +02:00
Aiken Harris
154b2062ba Unify GDT selector naming convention 2026-04-01 11:02:05 +02:00
Aiken Harris
d00577ac8d Fix previous mode detection by reading CS from the trap frame 2026-03-31 23:10:45 +02:00
Aiken Harris
620fc24cd2 Fix previous mode detection by reading CS from the trap frame and sanitize segment restoration 2026-03-31 20:38:21 +02:00
Aiken Harris
494b615dc2 Fix x64 ABI compliance by aligning stack and reserving shadow space 2026-03-31 20:06:25 +02:00
Aiken Harris
d834b7e0c8 Correct kernel stack base calculation for downward growing stacks 2026-03-31 18:59:59 +02:00
Aiken Harris
987b8f45d7 Unify trap handler macro name 2026-03-31 15:53:11 +02:00
Aiken Harris
121f461491 Refactor trap handling to support task gates 2026-03-31 12:58:46 +02:00
Aiken Harris
f4b189adef Fix incorrect descriptor type used for NMI TSS 2026-03-30 22:20:09 +02:00
Aiken Harris
40c4860548 Refine LDT setup and restore critical TSS fields for hardware exceptions 2026-03-30 20:29:43 +02:00
Aiken Harris
d2a7ae46ac Fix hardware task gate configuration 2026-03-30 20:16:44 +02:00
Aiken Harris
8a02a5aca3 Explicitly load GS and SS registers during segment initialization 2026-03-30 18:43:52 +02:00
Aiken Harris
96df5a80b8 Set CR3 field in TSS to ensure correct page table context on task switches 2026-03-30 14:56:41 +02:00
Aiken Harris
489ef8a514 Update IDT gate types for i686 exception handlers 2026-03-30 13:31:20 +02:00
Aiken Harris
8c6c63465f Use dedicated NMI stack on i686 2026-03-30 11:43:09 +02:00
Aiken Harris
a608b26fde Implement NMI stack handling via IST 2026-03-28 20:49:18 +01:00
Aiken Harris
32d3672a51 Generate distinct handlers for CPU traps and hardware interrupts 2026-03-27 20:42:41 +01:00
Aiken Harris
0c17337388 Fix symbol naming convention for i686 trap handlers 2026-03-27 19:23:37 +01:00