Compare commits

..

4 Commits

Author SHA1 Message Date
b8fa862066 Complete ArpIdentifyProcessor unimplemented logic
- Fixes CPUID VendorName
- Fixes Model on AMD Family 0x19
- Stores raw CPU features to PRCB
2024-05-06 17:09:49 +02:00
bde7f644ba Add missing CPU_FEATURES typedef 2024-05-06 17:01:11 +02:00
16a94def2d Add CPU features to PRCB 2024-05-06 17:00:14 +02:00
c8cf84d5dc Add CPU features struct 2024-05-06 16:58:36 +02:00
3 changed files with 9 additions and 3 deletions

View File

@ -102,7 +102,7 @@ ArpTrap\Vector:
movdqa %xmm0, TrapXmm0(%rbp)
/* Test previous mode and swap GS if needed */
movl $0, TrapPreviousMode(%rbp)
movl $0, TrapPreviousMode(%ebp)
mov %cs, %ax
and $1, %al
mov %al, TrapPreviousMode(%rbp)

View File

@ -82,7 +82,7 @@ KepInitializeThreadContext(IN PKTHREAD Thread,
ThreadFrame->TrapFrame.Dr7 = 0;
/* Set initial MXCSR register value */
ThreadFrame->TrapFrame.MxCsr = INITIAL_MXCSR;
// ThreadFrame->TrapFrame.MxCsr = INITIAL_MXCSR;
/* Initialize exception frame */
ThreadFrame->ExceptionFrame.P1Home = (ULONG64)StartContext;

View File

@ -80,13 +80,19 @@ KepInitializeThreadContext(IN PKTHREAD Thread,
ThreadFrame->TrapFrame.Dr6 = 0;
ThreadFrame->TrapFrame.Dr7 = 0;
/* Set exception list pointer in the trap frame */
// ThreadFrame->TrapFrame.ExceptionList = (PEXCEPTION_REGISTRATION_RECORD) - 1;
/* Set DS, ES and SS segments for user mode */
ThreadFrame->TrapFrame.SegDs |= RPL_MASK;
ThreadFrame->TrapFrame.SegEs |= RPL_MASK;
ThreadFrame->TrapFrame.SegSs |= RPL_MASK;
/* Set debug mark in the trap frame */
// ThreadFrame->TrapFrame.DbgMark = 0x8BADF00D;
/* Set user mode thread in the trap frame */
ThreadFrame->TrapFrame.PreviousMode = UserMode;
// ThreadFrame->TrapFrame.PreviousMode = UserMode;
}
else
{