exectos

Tweaks to AMD64 architecture support

build.yml #532:Commit 28c89986fb pushed by belliash

master

2024-04-19 23:38:24 +02:00

38s

Temporarily comment out thread code related to trap frame

build.yml #531:Commit b30d15719c pushed by belliash

master

2024-04-19 17:00:42 +02:00

37s

Initialize AMD64 segments properly

build.yml #528:Commit cf408519ad pushed by belliash

master

2024-04-17 20:03:23 +02:00

36s

Initialize CS segment on i686 architecture

build.yml #527:Commit 8aa33874ff pushed by belliash

master

2024-04-17 18:28:44 +02:00

34s

Fix loading CS segment for AMD64 architecture

build.yml #526:Commit 7011d456e9 pushed by belliash

master

2024-04-17 16:49:04 +02:00

36s

Fix loading CS segment for i686 architecture

build.yml #525:Commit b31aa82872 pushed by belliash

master

2024-04-17 16:47:05 +02:00

51s

Remove useless assembler options

build.yml #524:Commit 9d4751abee pushed by belliash

master

2024-04-14 11:38:00 +02:00

41s

Update toolchain settings

build.yml #523:Commit ffda2fd8a9 pushed by belliash

master

2024-04-14 11:19:30 +02:00

47s

build.yml #522:Commit befa211aa7 pushed by belliash

master

2024-04-08 19:04:44 +02:00

37s

Store page map level

build.yml #521:Commit 7193e698f1 pushed by belliash

master

2024-04-07 17:50:06 +02:00

34s

Properly, recursively self map page tables on i686 architecture

build.yml #520:Commit 388ac1a8c2 pushed by belliash

master

2024-04-07 17:11:57 +02:00

35s

Copy memory descriptor to fix i686 compiler error

build.yml #519:Commit 7c9233c9a2 pushed by belliash

master

2024-04-07 10:51:59 +02:00

34s

Do not pre-allocate memory

build.yml #513:Commit 42a1373612 pushed by belliash

master

2024-04-06 11:28:51 +02:00

39s

Properly, recursively self map page tables; currently only for AMD64 and PML4

build.yml #512:Commit 1305672875 pushed by belliash

master

2024-04-05 00:27:39 +02:00

45s

Add forward references for PTE related structures

build.yml #511:Commit d7b103f85d pushed by belliash

master

2024-04-03 16:04:00 +02:00

34s

Update PTE related structures

build.yml #510:Commit c6f3422c49 pushed by belliash

master

2024-04-03 16:01:18 +02:00

44s

Move cursor before changing console attributes

build.yml #509:Commit dcca4870cd pushed by belliash

master

2024-03-28 14:07:45 +01:00

42s

Truncate EFI memory descriptor to 4GB and never map EFI reserved memory like PCI BAR

build.yml #508:Commit 1cdc1d3e54 pushed by belliash

master

2024-03-26 23:05:39 +01:00

35s

Rename XTBL_MODULE_INFO definition to XTBL_MODULE_DATA, to not confuse with structure

build.yml #507:Commit 306891c9eb pushed by belliash

master

2024-03-25 07:15:04 +01:00

35s

First page is now always present in memory map, so there is no need to map it explicitly

build.yml #506:Commit e24c37c9b1 pushed by belliash

master

2024-03-24 23:02:36 +01:00

33s

Always map first page

build.yml #505:Commit ce8c66f93a pushed by belliash

master

2024-03-24 22:53:00 +01:00

33s

Map BIOS ROM and VRAM

build.yml #504:Commit b3be36e23d pushed by belliash

master

2024-03-24 15:54:23 +01:00

40s

RtlCountLeadingZeroes64() should take 64bit value

build.yml #503:Commit 74b2c80869 pushed by belliash

master

2024-03-23 00:37:42 +01:00

33s

Export RtlClearSetBits(), RtlFindClearBits(), RtlFindSetBits() and RtlSetClearBits() routines

build.yml #502:Commit 9aff665d1a pushed by belliash

master

2024-03-22 22:49:54 +01:00

33s

Implement RtlClearSetBits(), RtlFindClearBits(), RtlFindSetBits() and RtlSetClearBits() routines

build.yml #501:Commit 715f842445 pushed by belliash

master

2024-03-22 18:54:13 +01:00

35s

Fix RtlClearBits() and RtlSetBits()

build.yml #500:Commit 7895cb0d32 pushed by belliash

master

2024-03-21 21:37:15 +01:00

33s

Implement EDID support for getting the preferred screen resolution

build.yml #499:Commit 56d50ea2e8 pushed by belliash

master

2024-03-21 15:40:50 +01:00

33s

Use common handle and properly close GOP protocol on failures

build.yml #498:Commit eb75a27ac2 pushed by belliash

master

2024-03-21 06:59:55 +01:00

40s

Implement RtlClearBits() and RtlSetBits() routines

build.yml #497:Commit b6f915c0c5 pushed by belliash

master

2024-03-19 19:54:31 +01:00

33s

Expose BlEnterFirmwareSetup() routine via XTLDR protocol

build.yml #496:Commit 3cd55260e6 pushed by belliash

master

2024-03-19 17:12:22 +01:00

36s