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xt-sys
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exectos
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Adjust LA57 base addresses to prevent overflow
#793
:
Commit
a84ef21571
pushed by
harraiken
harraiken_mm
2025-08-21 01:43:37 +02:00
48s
Enable LA57 by invoking the trampoline code
#792
:
Commit
1ef2560ef6
pushed by
harraiken
harraiken_mm
2025-08-21 00:16:19 +02:00
48s
Resolve build issues caused by the last commit
#791
:
Commit
d1b14fccdd
pushed by
harraiken
harraiken_mm
2025-08-20 21:09:37 +02:00
46s
Allow specifying an allocation type when allocating pages
#790
:
Commit
88b3a57962
pushed by
harraiken
harraiken_mm
2025-08-20 21:00:35 +02:00
33s
Map the physical page for trampoline code
#789
:
Commit
9f6121e9b2
pushed by
harraiken
harraiken_mm
2025-08-20 20:38:49 +02:00
47s
Expose ArEnableExtendedPhysicalAddressing function in XTDK
#788
:
Commit
4a7ea6009d
pushed by
harraiken
harraiken_mm
2025-08-20 20:24:44 +02:00
49s
Extract trampoline code into a separate file
#787
:
Commit
c4a7df6f38
pushed by
harraiken
harraiken_mm
2025-08-20 20:21:54 +02:00
47s
Add trampoline to enable 5-level paging
#786
:
Commit
2468d80078
pushed by
harraiken
harraiken_mm
2025-08-20 00:21:37 +02:00
45s
Expand CR4, MSR, and EFER register definitions
#785
:
Commit
ebae8c655c
pushed by
harraiken
harraiken_mm
2025-08-20 00:01:02 +02:00
45s
Update and correct CR4 bit definitions
#784
:
Commit
1a0bc7f65f
pushed by
harraiken
harraiken_mm
2025-08-19 21:46:19 +02:00
44s
Implement PML5 support in XtpMapHardwareMemoryPool
#783
:
Commit
91a5db2ee4
pushed by
harraiken
harraiken_mm
2025-08-18 12:14:46 +02:00
44s
Implement PML5 self-mapping
#782
:
Commit
b639bf3077
pushed by
harraiken
harraiken_mm
2025-08-18 12:00:03 +02:00
44s
Correct VA masking in AMD64 page mapping functions
#781
:
Commit
c409400cbf
pushed by
harraiken
harraiken_mm
2025-08-18 01:08:23 +02:00
43s
Temporarily disable LA57 paging
#780
:
Commit
d602038858
pushed by
harraiken
harraiken_mm
2025-08-18 00:11:32 +02:00
46s
Align parameters in PTE manipulation functions
#779
:
Commit
017b8603d5
pushed by
harraiken
harraiken_mm
2025-08-17 21:56:20 +02:00
43s
Implement MmpSetPteCaching function for AMD64 architecture
#778
:
Commit
a9dd1eaacd
pushed by
harraiken
harraiken_mm
2025-08-17 21:52:39 +02:00
43s
Implement PTE manipulation functions for AMD64 architecture
#777
:
Commit
f30d3df5b3
pushed by
harraiken
harraiken_mm
2025-08-17 21:49:19 +02:00
34s
Fix type usage in XtpMapHardwareMemoryPool
#776
:
Commit
c3ece4f317
pushed by
harraiken
harraiken_mm
2025-08-17 00:52:21 +02:00
44s
Refactor hardware memory mapping to use page map routine callbacks
#775
:
Commit
1e11acee72
pushed by
harraiken
harraiken_mm
2025-08-17 00:48:48 +02:00
27s
Implement PML2/PML3 page table routines
#774
:
Commit
57193eecc0
pushed by
harraiken
harraiken_mm
2025-08-17 00:45:56 +02:00
32s
Assign page map routines
#773
:
Commit
720d525b95
pushed by
harraiken
harraiken_mm
2025-08-17 00:30:16 +02:00
27s
Introduce architecture-specific page map routines
#772
:
Commit
f77f2bbf92
pushed by
harraiken
harraiken_mm
2025-08-17 00:24:06 +02:00
35s
Relocate page mapping helpers and add PML5 support
#771
:
Commit
0ed59f223c
pushed by
harraiken
harraiken_mm
2025-08-16 21:08:41 +02:00
36s
Implement page map info initialization
#770
:
Commit
de2973ac42
pushed by
harraiken
harraiken_mm
2025-08-16 20:29:02 +02:00
34s
Remove PageMapLevel from the loader information block
#769
:
Commit
8491e5fed1
pushed by
harraiken
harraiken_mm
2025-08-16 20:19:22 +02:00
35s
Consolidate paging-related globals into MmpPageMapInfo
#768
:
Commit
6a330e38f2
pushed by
harraiken
harraiken_mm
2025-08-16 20:15:06 +02:00
32s
Define page map information structure for both supported architectures
#767
:
Commit
1dcd3fceed
pushed by
harraiken
harraiken_mm
2025-08-16 20:09:11 +02:00
35s
Prepare for architecture-specific paging initialization
#766
:
Commit
5768d4bba6
pushed by
harraiken
harraiken_mm
2025-08-16 19:58:55 +02:00
38s
Adapt i686 memory mapping to new PML3 types
#765
:
Commit
f85fe31b38
pushed by
harraiken
harraiken_mm
2025-08-16 00:37:14 +02:00
28s
Update forward declarations for PML2/PML3 types
#764
:
Commit
22f81a106b
pushed by
harraiken
harraiken_mm
2025-08-16 00:34:15 +02:00
36s
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