Architecture-specific system PTE limits

sdk/xtdk/amd64/mmtypes.h

@@ -86,6 +86,9 @@
 /* Minimum number of physical pages needed by the system */
 #define MM_MINIMUM_PHYSICAL_PAGES                  2048
 
+/* Number of system PTEs */
+#define MM_DEFAULT_NUMBER_SYSTEM_PTES              22000
+
 /* Default number of secondary colors */
 #define MM_DEFAULT_SECONDARY_COLORS                64
 
@@ -101,6 +104,9 @@
 /* Maximum physical address used by HAL allocations */
 #define MM_MAXIMUM_PHYSICAL_ADDRESS                0x00000000FFFFFFFFULL
 
+/* Highest system address */
+#define MM_HIGHEST_SYSTEM_ADDRESS                  0xFFFFFFFFFFFFFFFFULL
+
 /* Trampoline code address */
 #define MM_TRAMPOLINE_ADDRESS                      0x80000
 

sdk/xtdk/i686/mmtypes.h

@@ -78,6 +78,11 @@
 /* Minimum number of physical pages needed by the system */
 #define MM_MINIMUM_PHYSICAL_PAGES                  1100
 
+/* Number of system PTEs */
+#define MM_MINIMUM_NUMBER_SYSTEM_PTES              7000
+#define MM_DEFAULT_NUMBER_SYSTEM_PTES              11000
+#define MM_MAXIMUM_NUMBER_SYSTEM_PTES              22000
+
 /* Default number of secondary colors */
 #define MM_DEFAULT_SECONDARY_COLORS                64
 
@@ -93,6 +98,9 @@
 /* Maximum physical address used by HAL allocations */
 #define MM_MAXIMUM_PHYSICAL_ADDRESS                0xFFFFFFFF
 
+/* Highest system address */
+#define MM_HIGHEST_SYSTEM_ADDRESS                  0xFFFFFFFF
+
 /* Trampoline code address */
 #define MM_TRAMPOLINE_ADDRESS                      0x80000
 

xtoskrnl/includes/mm/mmgr.hh

@@ -19,9 +19,11 @@ namespace MM
     {
         private:
             STATIC MMMEMORY_LAYOUT MemoryLayout;
+            STATIC PFN_NUMBER NumberOfSystemPtes;
 
         public:
             STATIC XTAPI PMMMEMORY_LAYOUT GetMemoryLayout(VOID);
+            STATIC XTAPI PFN_NUMBER GetNumberOfSystemPtes();
             STATIC XTAPI VOID InitializeMemoryLayout(VOID);
             STATIC XTAPI VOID InitializeMemoryManager(VOID);
             STATIC XTAPI BOOLEAN VerifyMemoryTypeFree(LOADER_MEMORY_TYPE MemoryType);

xtoskrnl/mm/data.cc

@@ -30,9 +30,15 @@ ULONG_PTR MM::Pfn::HighestPhysicalPage;
 /* Lowest physical page number */
 ULONG_PTR MM::Pfn::LowestPhysicalPage = -1;
 
+/* Memory layout */
+MMMEMORY_LAYOUT MM::Manager::MemoryLayout;
+
 /* Number of physical pages */
 ULONG MM::Pfn::NumberOfPhysicalPages;
 
+/* Number of system PTEs */
+PFN_NUMBER MM::Manager::NumberOfSystemPtes;
+
 /* Old biggest free memory descriptor */
 LOADER_MEMORY_DESCRIPTOR MM::Pfn::OriginalFreeDescriptor;
 

xtoskrnl/mm/mmgr.cc

@@ -25,6 +25,13 @@ MM::Manager::GetMemoryLayout(VOID)
     return &MemoryLayout;
 }
 
+XTAPI
+PFN_NUMBER
+MM::Manager::GetNumberOfSystemPtes()
+{
+    return NumberOfSystemPtes;
+}
+
 /**
  * Initializes the kernel's virtual memory layout.
  *
@@ -48,36 +55,45 @@ MM::Manager::InitializeMemoryLayout(VOID)
     /* Retrieve the PFN database size */
     PfnDatabaseSize = MM::Pfn::GetPfnDatabaseSize();
 
+    /* Define the number of system PTEs */
+    NumberOfSystemPtes = MM_DEFAULT_NUMBER_SYSTEM_PTES;
+
     if(MM::Paging::GetXpaStatus())
     {
+        /* Configure memory layout for 5-level paging, using 57bit address space and providing a 128 PB address space */
         MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFEFA8000000000ULL;
         MemoryLayout.SelfMapAddress = (PVOID)0xFFEDF6FB7DBEDF68ULL;
 
+        /* Define the non-paged and paged pool regions */
         MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
         MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFEFFFFFFBFFFFFULL;
         MemoryLayout.PagedPoolStart = (PVOID)0xFFFEF8A000000000ULL;
         MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
 
+        /* Define hyperspace, system PTE space, and the user space limit */
         MemoryLayout.HyperSpaceStart = (PVOID)0xFFFEF70000000000ULL;
         MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFEF77FFFFFFFFFULL;
         MemoryLayout.SystemSpaceStart = (PVOID)0xFFFEF88000000000ULL;
-        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (MM_NUMBER_SYSTEM_PTES + 1) * MM_PAGE_SIZE);
+        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
         MemoryLayout.UserSpaceEnd = (PVOID)0x07FFFFFFFFFFFFFULL;
     }
     else
     {
+        /* Configure memory layout for 4-level paging, using 48bit address space and providing a 128 TB address space */
         MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFFFA8000000000ULL;
         MemoryLayout.SelfMapAddress = (PVOID)0xFFFFF6FB7DBEDF68ULL;
 
+        /* Define the non-paged and paged pool regions */
         MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
         MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFFFFFFFFBFFFFFULL;
         MemoryLayout.PagedPoolStart = (PVOID)0xFFFFF8A000000000ULL;
         MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
 
+        /* Define hyperspace, system PTE space, and the user space limit */
         MemoryLayout.HyperSpaceStart = (PVOID)0xFFFFF70000000000ULL;
         MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFFF77FFFFFFFFFULL;
         MemoryLayout.SystemSpaceStart = (PVOID)0xFFFFF88000000000ULL;
-        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (MM_NUMBER_SYSTEM_PTES + 1) * MM_PAGE_SIZE);
+        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
         MemoryLayout.UserSpaceEnd = (PVOID)0x000007FFFFFEFFFFULL;
     }
 }