From 017b8603d507cd2e554e342a442f16b28816a9af Mon Sep 17 00:00:00 2001
From: Aiken Harris <harraiken91@gmail.com>
Date: Sun, 17 Aug 2025 21:55:21 +0200
Subject: [PATCH] Align parameters in PTE manipulation functions

---
 xtoskrnl/mm/i686/pmap.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/xtoskrnl/mm/i686/pmap.c b/xtoskrnl/mm/i686/pmap.c
index 1c1034b..4decaba 100644
--- a/xtoskrnl/mm/i686/pmap.c
+++ b/xtoskrnl/mm/i686/pmap.c
@@ -137,8 +137,8 @@ MmpPml2PteValid(PHARDWARE_PTE PtePointer)
 XTAPI
 VOID
 MmpSetPml2Pte(PHARDWARE_PTE PtePointer,
-            PFN_NUMBER PageFrameNumber,
-            BOOLEAN Writable)
+              PFN_NUMBER PageFrameNumber,
+              BOOLEAN Writable)
 {
     PtePointer->Pml2.PageFrameNumber = PageFrameNumber;
     PtePointer->Pml2.Valid = 1;
@@ -164,8 +164,8 @@ MmpSetPml2Pte(PHARDWARE_PTE PtePointer,
 XTAPI
 VOID
 MmpSetPml2PteCaching(PHARDWARE_PTE PtePointer,
-                    BOOLEAN CacheDisable,
-                    BOOLEAN WriteThrough)
+                     BOOLEAN CacheDisable,
+                     BOOLEAN WriteThrough)
 {
     PtePointer->Pml2.CacheDisable = CacheDisable;
     PtePointer->Pml2.WriteThrough = WriteThrough;
@@ -207,8 +207,8 @@ MmpPml3PteValid(PHARDWARE_PTE PtePointer)
 XTAPI
 VOID
 MmpSetPml3Pte(PHARDWARE_PTE PtePointer,
-            PFN_NUMBER PageFrameNumber,
-            BOOLEAN Writable)
+              PFN_NUMBER PageFrameNumber,
+              BOOLEAN Writable)
 {
     PtePointer->Pml3.PageFrameNumber = PageFrameNumber;
     PtePointer->Pml3.Valid = 1;
@@ -234,8 +234,8 @@ MmpSetPml3Pte(PHARDWARE_PTE PtePointer,
 XTAPI
 VOID
 MmpSetPml3PteCaching(PHARDWARE_PTE PtePointer,
-                    BOOLEAN CacheDisable,
-                    BOOLEAN WriteThrough)
+                     BOOLEAN CacheDisable,
+                     BOOLEAN WriteThrough)
 {
     PtePointer->Pml3.CacheDisable = CacheDisable;
     PtePointer->Pml3.WriteThrough = WriteThrough;