From 049c9c6bbd75813a90f328f96e1d222a7e6309ef Mon Sep 17 00:00:00 2001 From: Aiken Harris Date: Wed, 17 Dec 2025 20:35:28 +0100 Subject: [PATCH] Update SelfMapAddress --- sdk/xtdk/amd64/mmtypes.h | 4 ---- xtoskrnl/mm/amd64/mmgr.cc | 4 ++-- xtoskrnl/mm/i686/mmgr.cc | 30 ++++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+), 6 deletions(-) diff --git a/sdk/xtdk/amd64/mmtypes.h b/sdk/xtdk/amd64/mmtypes.h index 8ad783d..f05f080 100644 --- a/sdk/xtdk/amd64/mmtypes.h +++ b/sdk/xtdk/amd64/mmtypes.h @@ -31,10 +31,6 @@ #define MM_PXE_LA57_BASE 0xFFEDF6FB7DA00000ULL #define MM_P5E_LA57_BASE 0xFFEDF6FB7DBED000ULL -/* Self map address */ -#define MM_PML4_SELF_MAP_ADDRESS 0xFFFFF6FB7DBEDF68ULL -#define MM_PML5_SELF_MAP_ADDRESS 0xFFEDF6FB7DBEDF68ULL - /* PTE shift values */ #define MM_PTE_SHIFT 3 #define MM_PTI_SHIFT 12 diff --git a/xtoskrnl/mm/amd64/mmgr.cc b/xtoskrnl/mm/amd64/mmgr.cc index f7b862a..b2c98bd 100644 --- a/xtoskrnl/mm/amd64/mmgr.cc +++ b/xtoskrnl/mm/amd64/mmgr.cc @@ -40,7 +40,7 @@ MM::Manager::InitializeMemoryLayout(VOID) { /* Configure memory layout for 5-level paging, using 57bit address space and providing a 128 PB address space */ MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFEFA8000000000ULL; - MemoryLayout.SelfMapAddress = (PVOID)MM_PML5_SELF_MAP_ADDRESS; + MemoryLayout.SelfMapAddress = (PVOID)MM_P5E_LA57_BASE; /* Define the non-paged and paged pool regions */ MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE); @@ -59,7 +59,7 @@ MM::Manager::InitializeMemoryLayout(VOID) { /* Configure memory layout for 4-level paging, using 48bit address space and providing a 128 TB address space */ MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFFFA8000000000ULL; - MemoryLayout.SelfMapAddress = (PVOID)MM_PML4_SELF_MAP_ADDRESS; + MemoryLayout.SelfMapAddress = (PVOID)MM_PXE_BASE; /* Define the non-paged and paged pool regions */ MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE); diff --git a/xtoskrnl/mm/i686/mmgr.cc b/xtoskrnl/mm/i686/mmgr.cc index fcd3dc6..e39aa82 100644 --- a/xtoskrnl/mm/i686/mmgr.cc +++ b/xtoskrnl/mm/i686/mmgr.cc @@ -47,9 +47,39 @@ MM::Manager::InitializeMemoryLayout(VOID) if(MM::Paging::GetXpaStatus()) { /* Configure memory layout for 3-level paging, using 36bit address space and providing a 64 GB address space */ + MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xB0000000; + MemoryLayout.SelfMapAddress = (PVOID)MM_PTE_BASE; + + /* Define the non-paged and paged pool regions */ + MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE); + MemoryLayout.NonPagedPoolEnd = (PVOID)0xEEFFFFFF; + MemoryLayout.PagedPoolStart = (PVOID)0xE2000000; + MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1); + + /* Define hyperspace, system PTE space, and the user space limit */ + MemoryLayout.HyperSpaceStart = (PVOID)0xC0800000; + MemoryLayout.HyperSpaceEnd = (PVOID)0xC0BFFFFF; + MemoryLayout.SystemSpaceStart = (PVOID)0xC0C00000; + MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE); + MemoryLayout.UserSpaceEnd = (PVOID)0x7FFEFFFF; } else { /* Configure memory layout for 2-level paging, using 32bit address space and providing a 4 GB address space */ + MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xB0000000; + MemoryLayout.SelfMapAddress = (PVOID)MM_PTE_BASE; + + /* Define the non-paged and paged pool regions */ + MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE); + MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFBE0000; + MemoryLayout.PagedPoolStart = (PVOID)0xE1000000; + MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1); + + /* Define hyperspace, system PTE space, and the user space limit */ + MemoryLayout.HyperSpaceStart = (PVOID)0xC0400000; + MemoryLayout.HyperSpaceEnd = (PVOID)0xC07FFFFF; + MemoryLayout.SystemSpaceStart = (PVOID)0xC0800000; + MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE); + MemoryLayout.UserSpaceEnd = (PVOID)0x7FFEFFFF; } }