Refactor trap handling to support task gates
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This commit is contained in:
2026-03-31 12:58:46 +02:00
parent f4b189adef
commit 121f461491
2 changed files with 137 additions and 101 deletions

View File

@@ -4,6 +4,7 @@
* FILE: xtoskrnl/ar/i686/archsup.S * FILE: xtoskrnl/ar/i686/archsup.S
* DESCRIPTION: Provides i686 architecture features not implementable in C. * DESCRIPTION: Provides i686 architecture features not implementable in C.
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org> * DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/ */
#include <ar/i686/asmsup.h> #include <ar/i686/asmsup.h>
@@ -13,22 +14,49 @@
/** /**
* Creates a trap or interrupt handler for the specified vector. * Creates a task, trap or interrupt handler for the specified vector.
* *
* @param Vector * @param Vector
* Supplies a trap/interrupt vector number. * Supplies a vector number.
* *
* @param Type * @param Type
* Specifies whether the handler is designed to handle an interrupt or a trap. * Specifies whether the handler is designed to handle an interrupt, a task or a trap.
* *
* @return This macro does not return any value. * @return This macro does not return any value.
* *
* @since XT 1.0 * @since XT 1.0
*/ */
.macro ArCreateTrapHandler Vector Type .macro ArCreateHandler Vector Type
.global _Ar\Type\Vector .global _Ar\Type\Vector
_Ar\Type\Vector: _Ar\Type\Vector:
/* Check handler type */ /* Check handler type */
.ifc \Type,Task
_Ar\Type\Vector\()Start:
/* Clear the Task Switch flag */
clts
/* Allocate the trap frame and inject the hardware vector for the dispatcher */
sub $TRAP_FRAME_SIZE, %esp
movl $\Vector, TrapVector(%esp)
/* Pass the trap frame pointer as an argument and clear the direction flag */
push %esp
cld
/* Pass control to the trap dispatcher */
call _ArDispatchTrap
/* Discard the argument and deallocate the trap frame */
add $4, %esp
add $TRAP_FRAME_SIZE, %esp
/* Hardware task return */
iretl
/* Spin back to the entry point to rearm the task gate */
jmp _Ar\Type\Vector\()Start
.else
/* Check handler type */
.ifc \Type,Trap .ifc \Type,Trap
/* Push fake error code for non-error vector traps */ /* Push fake error code for non-error vector traps */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30 .if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
@@ -141,13 +169,18 @@ KernelModeReturn\Type\Vector:
/* Skip error code and vector number, then return */ /* Skip error code and vector number, then return */
add $(2 * 4), %esp add $(2 * 4), %esp
iretl iretl
.endif
.endm .endm
/* Populate common interrupt and trap handlers */ /* Populate common interrupt, task and trap handlers */
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
ArCreateTrapHandler 0x\i\j Interrupt ArCreateHandler 0x\i\j Interrupt
ArCreateTrapHandler 0x\i\j Trap .if 0x\i\j == 0x02 || 0x\i\j == 0x08
ArCreateHandler 0x\i\j Task
.else
ArCreateHandler 0x\i\j Trap
.endif
.endr .endr
.endr .endr
@@ -165,6 +198,10 @@ _ArInterruptEntry:
_ArTrapEntry: _ArTrapEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.if 0x\i\j == 0x02 || 0x\i\j == 0x08
.long _ArTask0x\i\j
.else
.long _ArTrap0x\i\j .long _ArTrap0x\i\j
.endif
.endr .endr
.endr .endr

View File

@@ -195,7 +195,6 @@ VOID
AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame) AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame)
{ {
DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n"); DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n");
KE::Crash::Panic(0x02);
} }
/** /**