Unify GDT selector naming convention
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@@ -46,7 +46,7 @@ ArEnableExtendedPhysicalAddressing:
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leaq XpaEnterLongMode(%rip), %rbx
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leaq XpaEnterLongMode(%rip), %rbx
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/* Push the 32-bit code segment selector and the target address for a far jump */
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/* Push the 32-bit code segment selector and the target address for a far jump */
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pushq $GDT_R0_CMCODE
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pushq $KGDT_R0_CMCODE
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pushq %rax
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pushq %rax
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/* Perform a far return to switch to 32-bit compatibility mode */
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/* Perform a far return to switch to 32-bit compatibility mode */
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@@ -60,7 +60,7 @@ XpaEnterCompatMode:
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pushl %ecx
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pushl %ecx
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/* Set the stack segment to the 32-bit data segment selector */
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/* Set the stack segment to the 32-bit data segment selector */
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movl $GDT_R0_DATA, %eax
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movl $KGDT_R0_DATA, %eax
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movl %eax, %ss
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movl %eax, %ss
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/* Disable PGE and PCIDE to ensure all TLB entries will be flushed */
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/* Disable PGE and PCIDE to ensure all TLB entries will be flushed */
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@@ -100,7 +100,7 @@ XpaEnterCompatMode:
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XpaFlushInstructions:
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XpaFlushInstructions:
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/* Push the 64-bit code segment selector and the target address for a far jump */
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/* Push the 64-bit code segment selector and the target address for a far jump */
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pushl $GDT_R0_CODE
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pushl $KGDT_R0_CODE
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pushl %ebx
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pushl %ebx
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/* Perform a far return to switch to 64-bit long mode */
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/* Perform a far return to switch to 64-bit long mode */
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@@ -17,9 +17,9 @@
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#define CR4_PCIDE 0x00020000
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#define CR4_PCIDE 0x00020000
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/* GDT selectors */
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/* GDT selectors */
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#define GDT_R0_CMCODE 0x08
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#define KGDT_R0_CMCODE 0x08
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#define GDT_R0_CODE 0x10
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#define KGDT_R0_CODE 0x10
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#define GDT_R0_DATA 0x18
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#define KGDT_R0_DATA 0x18
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/* MSR registers */
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/* MSR registers */
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#define X86_MSR_EFER 0xC0000080
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#define X86_MSR_EFER 0xC0000080
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