Rename architecture CPU functions class

xtoskrnl/mm/amd64/paging.cc

@@ -22,7 +22,7 @@ BOOLEAN
 MM::Paging::GetExtendedPhysicalAddressingStatus(VOID)
 {
     /* Check if LA57 is enabled */
-    return ((AR::CpuFunc::ReadControlRegister(4) & CR4_LA57) != 0) ? TRUE : FALSE;
+    return ((AR::CpuFunctions::ReadControlRegister(4) & CR4_LA57) != 0) ? TRUE : FALSE;
 }
 
 /**

xtoskrnl/mm/amd64/pte.cc

@@ -99,7 +99,7 @@ MM::Pte::InitializePageTable(VOID)
     MemoryLayout = MM::Manager::GetMemoryLayout();
 
     /* Enable the Global Paging (PGE) feature */
-    AR::CpuFunc::WriteControlRegister(4, AR::CpuFunc::ReadControlRegister(4) | CR4_PGE);
+    AR::CpuFunctions::WriteControlRegister(4, AR::CpuFunctions::ReadControlRegister(4) | CR4_PGE);
 
     /* Check XPA status */
     if(Xpa)
@@ -123,7 +123,7 @@ MM::Pte::InitializePageTable(VOID)
     }
 
     /* Flush the TLB to invalidate all non-global entries */
-    AR::CpuFunc::FlushTlb();
+    AR::CpuFunctions::FlushTlb();
 
     /* Create a template PTE for mapping kernel pages */
     MM::Paging::ClearPte(&TemplatePte);