Refactor AR subsystem
This commit is contained in:
@@ -9,10 +9,6 @@
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#include <xtos.hh>
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/* Architecture-specific Library */
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namespace AR
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{
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/**
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* Instructs the processor to clear the interrupt flag.
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*
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@@ -22,7 +18,7 @@ namespace AR
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*/
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XTCDECL
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VOID
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CpuFunc::ClearInterruptFlag(VOID)
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AR::CpuFunc::ClearInterruptFlag(VOID)
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{
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__asm__ volatile("cli");
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}
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@@ -39,7 +35,7 @@ CpuFunc::ClearInterruptFlag(VOID)
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*/
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XTCDECL
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BOOLEAN
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CpuFunc::CpuId(IN OUT PCPUID_REGISTERS Registers)
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AR::CpuFunc::CpuId(IN OUT PCPUID_REGISTERS Registers)
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{
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UINT32 MaxLeaf;
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@@ -80,7 +76,7 @@ CpuFunc::CpuId(IN OUT PCPUID_REGISTERS Registers)
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*/
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XTCDECL
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VOID
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CpuFunc::FlushTlb(VOID)
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AR::CpuFunc::FlushTlb(VOID)
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{
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/* Flush the TLB by resetting the CR3 */
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ArWriteControlRegister(3, ArReadControlRegister(3));
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@@ -95,7 +91,7 @@ CpuFunc::FlushTlb(VOID)
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*/
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XTCDECL
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ULONG
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CpuFunc::GetCpuFlags(VOID)
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AR::CpuFunc::GetCpuFlags(VOID)
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{
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ULONG_PTR Flags;
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@@ -120,7 +116,7 @@ CpuFunc::GetCpuFlags(VOID)
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XTASSEMBLY
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XTCDECL
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ULONG_PTR
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CpuFunc::GetStackPointer(VOID)
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AR::CpuFunc::GetStackPointer(VOID)
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{
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/* Get current stack pointer */
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__asm__ volatile("mov %%esp, %%eax\n"
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@@ -139,7 +135,7 @@ CpuFunc::GetStackPointer(VOID)
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*/
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XTCDECL
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VOID
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CpuFunc::Halt(VOID)
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AR::CpuFunc::Halt(VOID)
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{
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__asm__ volatile("hlt");
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}
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@@ -153,7 +149,7 @@ CpuFunc::Halt(VOID)
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*/
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XTCDECL
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BOOLEAN
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CpuFunc::InterruptsEnabled(VOID)
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AR::CpuFunc::InterruptsEnabled(VOID)
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{
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ULONG_PTR Flags;
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@@ -176,7 +172,7 @@ CpuFunc::InterruptsEnabled(VOID)
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*/
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XTCDECL
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VOID
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CpuFunc::InvalidateTlbEntry(PVOID Address)
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AR::CpuFunc::InvalidateTlbEntry(PVOID Address)
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{
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__asm__ volatile("invlpg (%0)"
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:
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@@ -196,7 +192,7 @@ CpuFunc::InvalidateTlbEntry(PVOID Address)
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*/
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XTCDECL
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VOID
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CpuFunc::LoadGlobalDescriptorTable(IN PVOID Source)
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AR::CpuFunc::LoadGlobalDescriptorTable(IN PVOID Source)
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{
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__asm__ volatile("lgdt %0"
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:
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@@ -216,7 +212,7 @@ CpuFunc::LoadGlobalDescriptorTable(IN PVOID Source)
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*/
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XTCDECL
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VOID
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CpuFunc::LoadInterruptDescriptorTable(IN PVOID Source)
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AR::CpuFunc::LoadInterruptDescriptorTable(IN PVOID Source)
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{
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__asm__ volatile("lidt %0"
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:
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@@ -236,7 +232,7 @@ CpuFunc::LoadInterruptDescriptorTable(IN PVOID Source)
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*/
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XTCDECL
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VOID
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CpuFunc::LoadLocalDescriptorTable(IN USHORT Source)
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AR::CpuFunc::LoadLocalDescriptorTable(IN USHORT Source)
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{
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__asm__ volatile("lldtw %0"
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:
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@@ -258,7 +254,7 @@ CpuFunc::LoadLocalDescriptorTable(IN USHORT Source)
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*/
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XTCDECL
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VOID
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CpuFunc::LoadSegment(IN USHORT Segment,
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AR::CpuFunc::LoadSegment(IN USHORT Segment,
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IN ULONG Source)
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{
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switch(Segment)
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@@ -320,7 +316,7 @@ CpuFunc::LoadSegment(IN USHORT Segment,
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*/
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XTCDECL
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VOID
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CpuFunc::LoadTaskRegister(USHORT Source)
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AR::CpuFunc::LoadTaskRegister(USHORT Source)
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{
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__asm__ volatile("ltr %0"
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:
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@@ -336,7 +332,7 @@ CpuFunc::LoadTaskRegister(USHORT Source)
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*/
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XTCDECL
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VOID
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CpuFunc::MemoryBarrier(VOID)
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AR::CpuFunc::MemoryBarrier(VOID)
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{
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LONG Barrier;
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__asm__ volatile("xchg %%eax, %0"
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@@ -357,7 +353,7 @@ CpuFunc::MemoryBarrier(VOID)
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*/
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XTCDECL
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ULONG_PTR
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CpuFunc::ReadControlRegister(IN USHORT ControlRegister)
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AR::CpuFunc::ReadControlRegister(IN USHORT ControlRegister)
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{
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ULONG_PTR Value;
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@@ -414,7 +410,7 @@ CpuFunc::ReadControlRegister(IN USHORT ControlRegister)
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*/
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XTCDECL
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ULONG_PTR
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CpuFunc::ReadDebugRegister(IN USHORT DebugRegister)
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AR::CpuFunc::ReadDebugRegister(IN USHORT DebugRegister)
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{
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ULONG_PTR Value;
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@@ -483,7 +479,7 @@ CpuFunc::ReadDebugRegister(IN USHORT DebugRegister)
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*/
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XTCDECL
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ULONG
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CpuFunc::ReadFSDualWord(ULONG Offset)
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AR::CpuFunc::ReadFSDualWord(ULONG Offset)
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{
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ULONG Value;
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__asm__ volatile("movl %%fs:%a[Offset], %k[Value]"
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@@ -504,7 +500,7 @@ CpuFunc::ReadFSDualWord(ULONG Offset)
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*/
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XTCDECL
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ULONGLONG
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CpuFunc::ReadModelSpecificRegister(IN ULONG Register)
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AR::CpuFunc::ReadModelSpecificRegister(IN ULONG Register)
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{
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ULONGLONG Value;
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@@ -523,7 +519,7 @@ CpuFunc::ReadModelSpecificRegister(IN ULONG Register)
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*/
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XTCDECL
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UINT
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CpuFunc::ReadMxCsrRegister(VOID)
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AR::CpuFunc::ReadMxCsrRegister(VOID)
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{
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return __builtin_ia32_stmxcsr();
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}
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@@ -537,7 +533,7 @@ CpuFunc::ReadMxCsrRegister(VOID)
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*/
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XTCDECL
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ULONGLONG
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CpuFunc::ReadTimeStampCounter(VOID)
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AR::CpuFunc::ReadTimeStampCounter(VOID)
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{
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ULONGLONG Value;
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@@ -556,7 +552,7 @@ CpuFunc::ReadTimeStampCounter(VOID)
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*/
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XTCDECL
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VOID
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CpuFunc::ReadWriteBarrier(VOID)
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AR::CpuFunc::ReadWriteBarrier(VOID)
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{
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__asm__ volatile(""
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:
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@@ -573,7 +569,7 @@ CpuFunc::ReadWriteBarrier(VOID)
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*/
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XTCDECL
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VOID
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CpuFunc::SetInterruptFlag(VOID)
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AR::CpuFunc::SetInterruptFlag(VOID)
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{
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__asm__ volatile("sti");
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}
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@@ -590,7 +586,7 @@ CpuFunc::SetInterruptFlag(VOID)
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*/
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XTCDECL
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VOID
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CpuFunc::StoreGlobalDescriptorTable(OUT PVOID Destination)
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AR::CpuFunc::StoreGlobalDescriptorTable(OUT PVOID Destination)
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{
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__asm__ volatile("sgdt %0"
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: "=m" (*(PSHORT)Destination)
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@@ -610,7 +606,7 @@ CpuFunc::StoreGlobalDescriptorTable(OUT PVOID Destination)
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*/
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XTCDECL
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VOID
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CpuFunc::StoreInterruptDescriptorTable(OUT PVOID Destination)
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AR::CpuFunc::StoreInterruptDescriptorTable(OUT PVOID Destination)
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{
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__asm__ volatile("sidt %0"
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: "=m" (*(PSHORT)Destination)
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@@ -630,7 +626,7 @@ CpuFunc::StoreInterruptDescriptorTable(OUT PVOID Destination)
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*/
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XTCDECL
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VOID
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CpuFunc::StoreLocalDescriptorTable(OUT PVOID Destination)
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AR::CpuFunc::StoreLocalDescriptorTable(OUT PVOID Destination)
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{
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__asm__ volatile("sldt %0"
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: "=m" (*(PSHORT)Destination)
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@@ -653,7 +649,7 @@ CpuFunc::StoreLocalDescriptorTable(OUT PVOID Destination)
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*/
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XTCDECL
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VOID
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CpuFunc::StoreSegment(IN USHORT Segment,
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AR::CpuFunc::StoreSegment(IN USHORT Segment,
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OUT PVOID Destination)
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{
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switch(Segment)
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@@ -700,7 +696,7 @@ CpuFunc::StoreSegment(IN USHORT Segment,
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*/
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XTCDECL
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VOID
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CpuFunc::StoreTaskRegister(OUT PVOID Destination)
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AR::CpuFunc::StoreTaskRegister(OUT PVOID Destination)
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{
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__asm__ volatile("str %0"
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: "=m" (*(PULONG)Destination)
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@@ -723,7 +719,7 @@ CpuFunc::StoreTaskRegister(OUT PVOID Destination)
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*/
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XTCDECL
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VOID
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CpuFunc::WriteControlRegister(IN USHORT ControlRegister,
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AR::CpuFunc::WriteControlRegister(IN USHORT ControlRegister,
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IN UINT_PTR Value)
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{
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/* Write a value into specified control register */
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@@ -775,7 +771,7 @@ CpuFunc::WriteControlRegister(IN USHORT ControlRegister,
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*/
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XTCDECL
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VOID
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CpuFunc::WriteDebugRegister(IN USHORT DebugRegister,
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AR::CpuFunc::WriteDebugRegister(IN USHORT DebugRegister,
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IN UINT_PTR Value)
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{
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/* Write a value into specified debug register */
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@@ -844,7 +840,7 @@ CpuFunc::WriteDebugRegister(IN USHORT DebugRegister,
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*/
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XTCDECL
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VOID
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CpuFunc::WriteEflagsRegister(IN UINT_PTR Value)
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AR::CpuFunc::WriteEflagsRegister(IN UINT_PTR Value)
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{
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__asm__ volatile("push %0\n"
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"popf"
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@@ -867,7 +863,7 @@ CpuFunc::WriteEflagsRegister(IN UINT_PTR Value)
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*/
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XTCDECL
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VOID
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CpuFunc::WriteModelSpecificRegister(IN ULONG Register,
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AR::CpuFunc::WriteModelSpecificRegister(IN ULONG Register,
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IN ULONGLONG Value)
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{
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__asm__ volatile("wrmsr"
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@@ -885,7 +881,7 @@ CpuFunc::WriteModelSpecificRegister(IN ULONG Register,
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*/
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XTCDECL
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VOID
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CpuFunc::YieldProcessor(VOID)
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AR::CpuFunc::YieldProcessor(VOID)
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{
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__asm__ volatile("pause"
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:
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@@ -893,7 +889,7 @@ CpuFunc::YieldProcessor(VOID)
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: "memory");
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}
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} /* namespace */
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/* NEEDED BY XTLDR */
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XTCLINK
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