diff --git a/sdk/xtdk/amd64/hlfuncs.h b/sdk/xtdk/amd64/hlfuncs.h index 4e2ba3e..ea46016 100644 --- a/sdk/xtdk/amd64/hlfuncs.h +++ b/sdk/xtdk/amd64/hlfuncs.h @@ -37,42 +37,11 @@ HlIoPortOutByte(IN USHORT Port, XTAPI ULONG_PTR -HlReadCR0(); - -XTAPI -ULONG_PTR -HlReadCR2(); - -XTAPI -ULONG_PTR -HlReadCR3(); - -XTAPI -ULONG_PTR -HlReadCR4(); - -XTAPI -ULONG_PTR -HlReadCR8(); +HlReadControlRegister(USHORT ControlRegister); XTAPI VOID -HlWriteCR0(UINT_PTR Data); - -XTAPI -VOID -HlWriteCR2(UINT_PTR Data); - -XTAPI -VOID -HlWriteCR3(UINT_PTR Data); - -XTAPI -VOID -HlWriteCR4(UINT_PTR Data); - -XTAPI -VOID -HlWriteCR8(UINT_PTR Data); +HlWriteControlRegister(USHORT ControlRegister, + UINT_PTR Value); #endif /* __XTDK_AMD64_HLFUNCS_H */ diff --git a/sdk/xtdk/i686/hlfuncs.h b/sdk/xtdk/i686/hlfuncs.h index 10fbce6..cb33dff 100644 --- a/sdk/xtdk/i686/hlfuncs.h +++ b/sdk/xtdk/i686/hlfuncs.h @@ -37,34 +37,11 @@ HlIoPortOutByte(IN USHORT Port, XTAPI ULONG_PTR -HlReadCR0(); - -XTAPI -ULONG_PTR -HlReadCR2(); - -XTAPI -ULONG_PTR -HlReadCR3(); - -XTAPI -ULONG_PTR -HlReadCR4(); +HlReadControlRegister(USHORT ControlRegister); XTAPI VOID -HlWriteCR0(IN UINT_PTR Data); - -XTAPI -VOID -HlWriteCR2(IN UINT_PTR Data); - -XTAPI -VOID -HlWriteCR3(IN UINT_PTR Data); - -XTAPI -VOID -HlWriteCR4(IN UINT_PTR Data); +HlWriteControlRegister(USHORT ControlRegister, + UINT_PTR Value); #endif /* __XTDK_I686_HLFUNCS_H */ diff --git a/xtldr/amd64/memory.c b/xtldr/amd64/memory.c index c61c9de..23f58a3 100644 --- a/xtldr/amd64/memory.c +++ b/xtldr/amd64/memory.c @@ -168,7 +168,7 @@ BlEnablePaging(IN PLIST_ENTRY MemoryMappings, MemoryMap->DescriptorVersion, MemoryMap->Map); /* Write PML4 to CR3 */ - HlWriteCR3((UINT_PTR)*PtePointer); + HlWriteControlRegister(3, (UINT_PTR)*PtePointer); /* Return success */ return STATUS_EFI_SUCCESS; diff --git a/xtldr/i686/memory.c b/xtldr/i686/memory.c index c8d1218..f353dd8 100644 --- a/xtldr/i686/memory.c +++ b/xtldr/i686/memory.c @@ -170,7 +170,7 @@ BlEnablePaging(IN PLIST_ENTRY MemoryMappings, VirtualAddress = (PVOID)(UINT_PTR)(PDPTAddress + EFI_PAGE_SIZE + KSEG0_BASE); /* Set base page frame number */ - Address = 0x100000; // MEM_TOP_DOWN ? + Address = 0x100000; /* Allocate pages for the PFN */ Status = BlEfiMemoryAllocatePages(4, &Address); @@ -278,14 +278,14 @@ BlEnablePaging(IN PLIST_ENTRY MemoryMappings, if(PaeExtension) { /* Enable Physical Address Extension (PAE) */ - HlWriteCR4(HlReadCR4() | 0x00000020); + HlWriteControlRegister(4, HlReadControlRegister(4) | 0x00000020); } /* Write page mappings to CR3 */ - HlWriteCR3((UINT_PTR)*PtePointer); + HlWriteControlRegister(3, (UINT_PTR)*PtePointer); /* Enable paging */ - HlWriteCR0(HlReadCR0() | 0x80000000); + HlWriteControlRegister(0, HlReadControlRegister(0) | 0x80000000); /* Return success */ return STATUS_EFI_SUCCESS; diff --git a/xtoskrnl/hl/amd64/cpufunc.c b/xtoskrnl/hl/amd64/cpufunc.c index 0cb1981..1d1440f 100644 --- a/xtoskrnl/hl/amd64/cpufunc.c +++ b/xtoskrnl/hl/amd64/cpufunc.c @@ -114,105 +114,76 @@ HlIoPortOutByte(IN USHORT Port, } /** - * Reads the CR0 register and returns its value. + * Reads the specified CPU control register and returns its value. * - * @return The value stored in the CR0 register. + * @param ControlRegister + * Supplies a number of a control register which controls the general behavior of a CPU. + * + * @return The value stored in the control register. * * @since XT 1.0 */ XTAPI ULONG_PTR -HlReadCR0() +HlReadControlRegister(USHORT ControlRegister) { ULONG_PTR Value; - asm volatile("mov %%cr0, %0" - : "=r" (Value) - : - : "memory"); + + /* Read a value from specified CR register */ + switch(ControlRegister) + { + case 0: + /* Read value from CR0 */ + asm volatile("mov %%cr0, %0" + : "=r" (Value) + : + : "memory"); + break; + case 2: + /* Read value from CR2 */ + asm volatile("mov %%cr2, %0" + : "=r" (Value) + : + : "memory"); + break; + case 3: + /* Read value from CR3 */ + asm volatile("mov %%cr3, %0" + : "=r" (Value) + : + : "memory"); + break; + case 4: + /* Read value from CR4 */ + asm volatile("mov %%cr4, %0" + : "=r" (Value) + : + : "memory"); + break; + case 8: + /* Read value from CR8 */ + asm volatile("mov %%cr8, %0" + : "=r" (Value) + : + : "memory"); + default: + /* Invalid control register set */ + Value = 0; + break; + } + + /* Return value read from given CR register */ return Value; } /** - * Reads the CR2 register and returns its value. + * Writes a value to the specified CPU control register. * - * @return The value stored in the CR2 register. + * @param ControlRegister + * Supplies a number of a control register which controls the general behavior of a CPU. * - * @since XT 1.0 - */ -XTAPI -ULONG_PTR -HlReadCR2() -{ - ULONG_PTR Value; - asm volatile("mov %%cr2, %0" - : "=r" (Value) - : - : "memory"); - return Value; -} - -/** - * Reads the CR3 register and returns its value. - * - * @return The value stored in the CR3 register. - * - * @since XT 1.0 - */ -XTAPI -ULONG_PTR -HlReadCR3() -{ - ULONG_PTR Value; - asm volatile("mov %%cr3, %0" - : "=r" (Value) - : - : "memory"); - return Value; -} - -/** - * Reads the CR4 register and returns its value. - * - * @return The value stored in the CR4 register. - * - * @since XT 1.0 - */ -XTAPI -ULONG_PTR -HlReadCR4() -{ - ULONG_PTR Value; - asm volatile("mov %%cr4, %0" - : "=r" (Value) - : - : "memory"); - return Value; -} - -/** - * Reads the CR8 register and returns its value. - * - * @return The value stored in the CR8 register. - * - * @since XT 1.0 - */ -XTAPI -ULONG_PTR -HlReadCR8() -{ - ULONG_PTR Value; - asm volatile("mov %%cr8, %0" - : "=r" (Value) - : - : "memory"); - return Value; -} - -/** - * Writes the value to the CR0 register. - * - * @param Data - * The value to write to the CR0 register. + * @param Value + * Suplies a value to write to the CR register. * * @return This routine does not return any value. * @@ -220,90 +191,46 @@ HlReadCR8() */ XTAPI VOID -HlWriteCR0(UINT_PTR Data) +HlWriteControlRegister(USHORT ControlRegister, + UINT_PTR Value) { - asm volatile("mov %0, %%cr0" - : - : "r"(Data) - : "memory"); -} - -/** - * Writes the value to the CR2 register. - * - * @param Data - * The value to write to the CR2 register. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTAPI -VOID -HlWriteCR2(UINT_PTR Data) -{ - asm volatile("mov %0, %%cr2" - : - : "r"(Data) - : "memory"); -} - -/** - * Writes the value to the CR3 register. - * - * @param Data - * The value to write to the CR3 register. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTAPI -VOID -HlWriteCR3(UINT_PTR Data) -{ - asm volatile("mov %0, %%cr3" - : - : "r"(Data) - : "memory"); -} - -/** - * Writes the value to the CR4 register. - * - * @param Data - * The value to write to the CR4 register. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTAPI -VOID -HlWriteCR4(UINT_PTR Data) -{ - asm volatile("mov %0, %%cr4" - : - : "r"(Data) - : "memory"); -} - -/** - * Writes the value to the CR8 register. - * - * @param Data - * The value to write to the CR8 register. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTAPI -VOID -HlWriteCR8(UINT_PTR Data) -{ - asm volatile("mov %0, %%cr8" - : - : "r"(Data) - : "memory"); + /* Write a value into specified control register */ + switch(ControlRegister) + { + case 0: + /* Write value to CR0 */ + asm volatile("mov %0, %%cr0" + : + : "r"(Value) + : "memory"); + break; + case 2: + /* Write value to CR2 */ + asm volatile("mov %0, %%cr2" + : + : "r"(Value) + : "memory"); + break; + case 3: + /* Write value to CR3 */ + asm volatile("mov %0, %%cr3" + : + : "r"(Value) + : "memory"); + break; + case 4: + /* Write value to CR4 */ + asm volatile("mov %0, %%cr4" + : + : "r"(Value) + : "memory"); + break; + case 8: + /* Write value to CR8 */ + asm volatile("mov %0, %%cr8" + : + : "r"(Value) + : "memory"); + break; + } } diff --git a/xtoskrnl/hl/i686/cpufunc.c b/xtoskrnl/hl/i686/cpufunc.c index 5187a62..8b05cc7 100644 --- a/xtoskrnl/hl/i686/cpufunc.c +++ b/xtoskrnl/hl/i686/cpufunc.c @@ -114,86 +114,70 @@ HlIoPortOutByte(IN USHORT Port, } /** - * Reads the CR0 register and returns its value. + * Reads the specified CPU control register and returns its value. * - * @return The value stored in the CR0 register. + * @param ControlRegister + * Supplies a number of a control register which controls the general behavior of a CPU. + * + * @return The value stored in the control register. * * @since XT 1.0 */ XTAPI ULONG_PTR -HlReadCR0() +HlReadControlRegister(USHORT ControlRegister) { ULONG_PTR Value; - asm volatile("mov %%cr0, %0" - : "=r" (Value) - : - : "memory"); + + /* Read a value from specified CR register */ + switch(ControlRegister) + { + case 0: + /* Read value from CR0 */ + asm volatile("mov %%cr0, %0" + : "=r" (Value) + : + : "memory"); + break; + case 2: + /* Read value from CR2 */ + asm volatile("mov %%cr2, %0" + : "=r" (Value) + : + : "memory"); + break; + case 3: + /* Read value from CR3 */ + asm volatile("mov %%cr3, %0" + : "=r" (Value) + : + : "memory"); + break; + case 4: + /* Read value from CR4 */ + asm volatile("mov %%cr4, %0" + : "=r" (Value) + : + : "memory"); + break; + default: + /* Invalid control register set */ + Value = 0; + break; + } + + /* Return value read from given CR register */ return Value; } /** - * Reads the CR2 register and returns its value. + * Writes a value to the specified CPU control register. * - * @return The value stored in the CR2 register. + * @param ControlRegister + * Supplies a number of a control register which controls the general behavior of a CPU. * - * @since XT 1.0 - */ -XTAPI -ULONG_PTR -HlReadCR2() -{ - ULONG_PTR Value; - asm volatile("mov %%cr2, %0" - : "=r" (Value) - : - : "memory"); - return Value; -} - -/** - * Reads the CR3 register and returns its value. - * - * @return The value stored in the CR3 register. - * - * @since XT 1.0 - */ -XTAPI -ULONG_PTR -HlReadCR3() -{ - ULONG_PTR Value; - asm volatile("mov %%cr3, %0" - : "=r" (Value) - : - : "memory"); - return Value; -} - -/** - * Reads the CR4 register and returns its value. - * - * @return The value stored in the CR4 register. - * - * @since XT 1.0 - */ -XTAPI -ULONG_PTR -HlReadCR4() -{ - ULONG_PTR Value; - asm volatile("mov %%cr4, %0" - : "=r" (Value) - : - : "memory"); - return Value; -} - -/** - * Writes the value to the CR0 register. - * - * @param Data - * The value to write to the CR0 register. + * @param Value + * Suplies a value to write to the CR register. * * @return This routine does not return any value. * @@ -201,70 +185,39 @@ HlReadCR4() */ XTAPI VOID -HlWriteCR0(UINT_PTR Data) +HlWriteControlRegister(USHORT ControlRegister, + UINT_PTR Value) { - asm volatile("mov %0, %%cr0" - : - : "r"(Data) - : "memory"); -} - -/** - * Writes the value to the CR2 register. - * - * @param Data - * The value to write to the CR2 register. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTAPI -VOID -HlWriteCR2(UINT_PTR Data) -{ - asm volatile("mov %0, %%cr2" - : - : "r"(Data) - : "memory"); -} - -/** - * Writes the value to the CR3 register. - * - * @param Data - * The value to write to the CR3 register. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTAPI -VOID -HlWriteCR3(UINT_PTR Data) -{ - asm volatile("mov %0, %%cr3" - : - : "r"(Data) - : "memory"); -} - -/** - * Writes the value to the CR4 register. - * - * @param Data - * The value to write to the CR4 register. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTAPI -VOID -HlWriteCR4(UINT_PTR Data) -{ - asm volatile("mov %0, %%cr4" - : - : "r"(Data) - : "memory"); + /* Write a value into specified control register */ + switch(ControlRegister) + { + case 0: + /* Write value to CR0 */ + asm volatile("mov %0, %%cr0" + : + : "r"(Value) + : "memory"); + break; + case 2: + /* Write value to CR2 */ + asm volatile("mov %0, %%cr2" + : + : "r"(Value) + : "memory"); + break; + case 3: + /* Write value to CR3 */ + asm volatile("mov %0, %%cr3" + : + : "r"(Value) + : "memory"); + break; + case 4: + /* Write value to CR4 */ + asm volatile("mov %0, %%cr4" + : + : "r"(Value) + : "memory"); + break; + } }