Migrate MM subsystem to C++

2025-09-15 22:15:07 +02:00
parent 3e097c260d
commit 404595801d
26 changed files with 919 additions and 487 deletions
--- a/xtoskrnl/mm/i686/globals.c
+++ b/xtoskrnl/mm/i686/globals.c
@@ -1,26 +0,0 @@
-/**
- * PROJECT:         ExectOS
- * COPYRIGHT:       See COPYING.md in the top level directory
- * FILE:            xtoskrnl/mm/i686/globals.c
- * DESCRIPTION:     i686-specific global variables for the Memory Manager
- * DEVELOPERS:      Aiken Harris <harraiken91@gmail.com>
- */
-
-#include <xtos.h>
-
-
-/* Page mapping routines for systems using 2-level paging (PML2) */
-CMMPAGEMAP_ROUTINES MmpPml2Routines = {
-    .ClearPte = MmpClearPte,
-    .PteValid = MmpPml2PteValid,
-    .SetPteCaching = MmpSetPml2PteCaching,
-    .SetPte = MmpSetPml2Pte,
-};
-
-/* Page mapping routines for systems using 3-level paging (PML3) */
-CMMPAGEMAP_ROUTINES MmpPml3Routines = {
-    .ClearPte = MmpClearPte,
-    .PteValid = MmpPml3PteValid,
-    .SetPteCaching = MmpSetPml3PteCaching,
-    .SetPte = MmpSetPml3Pte,
-};
--- a/xtoskrnl/mm/i686/init.c
+++ b/xtoskrnl/mm/i686/init.c
@@ -1,71 +0,0 @@
-/**
- * PROJECT:         ExectOS
- * COPYRIGHT:       See COPYING.md in the top level directory
- * FILE:            xtoskrnl/mm/i686/init.c
- * DESCRIPTION:     Architecture specific Memory Manager initialization routines
- * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
- *                  Aiken Harris <harraiken91@gmail.com>
- */
-
-#include <xtos.h>
-
-
-/**
- * Detects if eXtended Physical Addressing (XPA) is enabled and initializes page map support.
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-MmInitializePageMapSupport(VOID)
-{
-    /* Check if XPA is enabled */
-    if(MmpGetExtendedPhysicalAddressingStatus())
-    {
-        /* XPA enabled, use modern PAE paging (PML3) */
-        MmpPageMapRoutines = &MmpPml3Routines;
-
-        /* Set PML3 page map information */
-        MmpPageMapInfo.Xpa = TRUE;
-
-        /* Set PML3 base addresses */
-        MmpPageMapInfo.PteBase = MM_PTE_BASE;
-        MmpPageMapInfo.PdeBase = MM_PDE_BASE;
-
-        /* Set PML3 shift values */
-        MmpPageMapInfo.PdiShift = MM_PDI_SHIFT;
-        MmpPageMapInfo.PteShift = MM_PTE_SHIFT;
-    }
-    else
-    {
-        /* XPA disabled, use legacy i386 paging (PML2) */
-        MmpPageMapRoutines = &MmpPml2Routines;
-
-        /* Set PML2 page map information */
-        MmpPageMapInfo.Xpa = FALSE;
-
-        /* Set PML2 base addresses */
-        MmpPageMapInfo.PteBase = MM_PTE_BASE;
-        MmpPageMapInfo.PdeBase = MM_PDE_LEGACY_BASE;
-
-        /* Set PML2 shift values */
-        MmpPageMapInfo.PdiShift = MM_PDI_LEGACY_SHIFT;
-        MmpPageMapInfo.PteShift = MM_PTE_LEGACY_SHIFT;
-    }
-}
-
-/**
- * Performs architecture specific initialization of the XTOS Memory Manager.
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-MmpInitializeArchitecture(VOID)
-{
-    UNIMPLEMENTED;
-}
--- a/xtoskrnl/mm/i686/init.cc
+++ b/xtoskrnl/mm/i686/init.cc
@@ -0,0 +1,25 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/mm/i686/init.cc
+ * DESCRIPTION:     Architecture specific Memory Manager initialization routines
+ * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
+ *                  Aiken Harris <harraiken91@gmail.com>
+ */
+
+#include <xtos.hh>
+
+
+/**
+ * Performs architecture specific initialization of the XTOS Memory Manager.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MM::Init::InitializeArchitecture(VOID)
+{
+    UNIMPLEMENTED;
+}
--- a/xtoskrnl/mm/i686/pagemap.cc
+++ b/xtoskrnl/mm/i686/pagemap.cc
@@ -1,12 +1,12 @@
 /**
 * PROJECT:         ExectOS
 * COPYRIGHT:       See COPYING.md in the top level directory
- * FILE:            xtoskrnl/mm/i686/pmap.c
+ * FILE:            xtoskrnl/mm/i686/pagemap.cc
 * DESCRIPTION:     Low-level support for i686 page map manipulation
 * DEVELOPERS:      Aiken Harris <harraiken91@gmail.com>
 */

-#include <xtos.h>
+#include <xtos.hh>


 /**
@@ -21,26 +21,11 @@
 */
 XTAPI
 VOID
-MmpClearPte(PHARDWARE_PTE PtePointer)
+MM::PageMap::ClearPte(PHARDWARE_PTE PtePointer)
 {
    PtePointer->Long = 0;
 }

-/**
- * Checks if eXtended Physical Addressing (XPA) is enabled.
- *
- * @return This routine returns TRUE if PAE is enabled, or FALSE otherwise.
- *
- * @since XT 1.0
- */
-XTAPI
-BOOLEAN
-MmpGetExtendedPhysicalAddressingStatus(VOID)
-{
-    /* Check if PAE is enabled */
-    return ((ArReadControlRegister(4) & CR4_PAE) != 0) ? TRUE : FALSE;
-}
-
 /**
 * Gets the address of the PDE (Page Directory Entry), that maps given address.
 *
@@ -53,13 +38,13 @@ MmpGetExtendedPhysicalAddressingStatus(VOID)
 */
 XTAPI
 PMMPDE
-MmpGetPdeAddress(PVOID Address)
+MM::PageMap::GetPdeAddress(PVOID Address)
 {
    ULONG Offset;

-    /* Calculate offset and return PTE address */
-    Offset = ((((ULONG)(Address)) >> MmpPageMapInfo.PdiShift) << MmpPageMapInfo.PteShift);
-    return (PMMPTE)(MmpPageMapInfo.PdeBase + Offset);
+    /* Calculate offset and return PDE address */
+    Offset = ((((ULONG_PTR)(Address)) >> PageMapInfo.PdiShift) << PageMapInfo.PteShift);
+    return (PMMPDE)(PageMapInfo.PdeBase + Offset);
 }

 /**
@@ -74,10 +59,10 @@ MmpGetPdeAddress(PVOID Address)
 */
 XTAPI
 PMMPPE
-MmpGetPpeAddress(PVOID Address)
+MM::PageMap::GetPpeAddress(PVOID Address)
 {
    /* Return zero */
-    return 0;
+    return (PMMPPE)0;
 }

 /**
@@ -92,15 +77,38 @@ MmpGetPpeAddress(PVOID Address)
 */
 XTAPI
 PMMPTE
-MmpGetPteAddress(PVOID Address)
+MM::PageMap::GetPteAddress(PVOID Address)
 {
    ULONG Offset;

    /* Calculate offset and return PTE address */
-    Offset = ((((ULONG)(Address)) >> MM_PTI_SHIFT) << MmpPageMapInfo.PteShift);
+    Offset = ((((ULONG_PTR)(Address)) >> MM_PTI_SHIFT) << PageMapInfo.PteShift);
    return (PMMPTE)(MM_PTE_BASE + Offset);
 }

+/**
+ * Initializes page map information for basic paging (PML2).
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MM::PageMapBasic::InitializePageMapInfo(VOID)
+{
+    /* Set PML2 page map information */
+    PageMapInfo.Xpa = FALSE;
+
+    /* Set PML2 base addresses */
+    PageMapInfo.PteBase = MM_PTE_BASE;
+    PageMapInfo.PdeBase = MM_PDE_LEGACY_BASE;
+
+    /* Set PML2 shift values */
+    PageMapInfo.PdiShift = MM_PDI_LEGACY_SHIFT;
+    PageMapInfo.PteShift = MM_PTE_LEGACY_SHIFT;
+}
+
 /**
 * Checks whether the given PML2 page table entry (PTE) is valid.
 *
@@ -113,7 +121,7 @@ MmpGetPteAddress(PVOID Address)
 */
 XTAPI
 BOOLEAN
-MmpPml2PteValid(PHARDWARE_PTE PtePointer)
+MM::PageMapBasic::PteValid(PHARDWARE_PTE PtePointer)
 {
    return (BOOLEAN)PtePointer->Pml2.Valid;
 }
@@ -136,9 +144,9 @@ MmpPml2PteValid(PHARDWARE_PTE PtePointer)
 */
 XTAPI
 VOID
-MmpSetPml2Pte(PHARDWARE_PTE PtePointer,
-              PFN_NUMBER PageFrameNumber,
-              BOOLEAN Writable)
+MM::PageMapBasic::SetPte(PHARDWARE_PTE PtePointer,
+                         PFN_NUMBER PageFrameNumber,
+                         BOOLEAN Writable)
 {
    PtePointer->Pml2.PageFrameNumber = PageFrameNumber;
    PtePointer->Pml2.Valid = 1;
@@ -163,14 +171,37 @@ MmpSetPml2Pte(PHARDWARE_PTE PtePointer,
 */
 XTAPI
 VOID
-MmpSetPml2PteCaching(PHARDWARE_PTE PtePointer,
-                     BOOLEAN CacheDisable,
-                     BOOLEAN WriteThrough)
+MM::PageMapBasic::SetPteCaching(PHARDWARE_PTE PtePointer,
+                                BOOLEAN CacheDisable,
+                                BOOLEAN WriteThrough)
 {
    PtePointer->Pml2.CacheDisable = CacheDisable;
    PtePointer->Pml2.WriteThrough = WriteThrough;
 }

+/**
+ * Initializes page map information for basic paging (PML3).
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MM::PageMapXpa::InitializePageMapInfo(VOID)
+{
+    /* Set PML2 page map information */
+    PageMapInfo.Xpa = TRUE;
+
+    /* Set PML2 base addresses */
+    PageMapInfo.PteBase = MM_PTE_BASE;
+    PageMapInfo.PdeBase = MM_PDE_BASE;
+
+    /* Set PML2 shift values */
+    PageMapInfo.PdiShift = MM_PDI_SHIFT;
+    PageMapInfo.PteShift = MM_PTE_SHIFT;
+}
+
 /**
 * Checks whether the given PML3 page table entry (PTE) is valid.
 *
@@ -183,9 +214,9 @@ MmpSetPml2PteCaching(PHARDWARE_PTE PtePointer,
 */
 XTAPI
 BOOLEAN
-MmpPml3PteValid(PHARDWARE_PTE PtePointer)
+MM::PageMapXpa::PteValid(PHARDWARE_PTE PtePointer)
 {
-    return PtePointer->Pml3.Valid;
+    return (BOOLEAN)PtePointer->Pml3.Valid;
 }

 /**
@@ -206,9 +237,9 @@ MmpPml3PteValid(PHARDWARE_PTE PtePointer)
 */
 XTAPI
 VOID
-MmpSetPml3Pte(PHARDWARE_PTE PtePointer,
-              PFN_NUMBER PageFrameNumber,
-              BOOLEAN Writable)
+MM::PageMapXpa::SetPte(PHARDWARE_PTE PtePointer,
+                       PFN_NUMBER PageFrameNumber,
+                       BOOLEAN Writable)
 {
    PtePointer->Pml3.PageFrameNumber = PageFrameNumber;
    PtePointer->Pml3.Valid = 1;
@@ -233,9 +264,9 @@ MmpSetPml3Pte(PHARDWARE_PTE PtePointer,
 */
 XTAPI
 VOID
-MmpSetPml3PteCaching(PHARDWARE_PTE PtePointer,
-                     BOOLEAN CacheDisable,
-                     BOOLEAN WriteThrough)
+MM::PageMapXpa::SetPteCaching(PHARDWARE_PTE PtePointer,
+                              BOOLEAN CacheDisable,
+                              BOOLEAN WriteThrough)
 {
    PtePointer->Pml3.CacheDisable = CacheDisable;
    PtePointer->Pml3.WriteThrough = WriteThrough;
--- a/xtoskrnl/mm/i686/paging.cc
+++ b/xtoskrnl/mm/i686/paging.cc
@@ -1,14 +1,30 @@
 /**
 * PROJECT:         ExectOS
 * COPYRIGHT:       See COPYING.md in the top level directory
- * FILE:            xtoskrnl/mm/i686/pages.c
+ * FILE:            xtoskrnl/mm/i686/paging.cc
 * DESCRIPTION:     Architecture dependent paging support
 * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
+ *                  Aiken Harris <harraiken91@gmail.com>
 */

-#include <xtos.h>
+#include <xtos.hh>


+/**
+ * Checks if eXtended Physical Addressing (XPA) is enabled.
+ *
+ * @return This routine returns TRUE if PAE is enabled, or FALSE otherwise.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+BOOLEAN
+MM::Paging::GetExtendedPhysicalAddressingStatus(VOID)
+{
+    /* Check if PAE is enabled */
+    return ((AR::CpuFunc::ReadControlRegister(4) & CR4_PAE) != 0) ? TRUE : FALSE;
+}
+
 /**
 * Fills a section of memory with zeroes like RtlZeroMemory(), but in more efficient way.
 *
@@ -24,8 +40,8 @@
 */
 XTFASTCALL
 VOID
-MmZeroPages(IN PVOID Address,
-            IN ULONG Size)
+MM::Paging::ZeroPages(IN PVOID Address,
+                      IN ULONG Size)
 {
    __asm__ volatile("xor %%eax, %%eax\n"
                     "rep stosb"