From 410b96b58a8ea4ae212e8f43bd4446101d42b2b7 Mon Sep 17 00:00:00 2001 From: Aiken Harris Date: Wed, 30 Jul 2025 17:19:37 +0200 Subject: [PATCH] Zero-initialize Page Directory entries before use --- xtldr/arch/amd64/memory.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/xtldr/arch/amd64/memory.c b/xtldr/arch/amd64/memory.c index 0b1d712..276d0f0 100644 --- a/xtldr/arch/amd64/memory.c +++ b/xtldr/arch/amd64/memory.c @@ -216,6 +216,7 @@ BlMapPage(IN PXTBL_PAGE_MAPPING PageMap, } /* Set paging entry settings */ + RtlZeroMemory(&Pml1[Pml1Entry], sizeof(HARDWARE_PTE)); Pml1[Pml1Entry].PageFrameNumber = PageFrameNumber; Pml1[Pml1Entry].Valid = 1; Pml1[Pml1Entry].Writable = 1; @@ -250,8 +251,12 @@ EFI_STATUS BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR SelfMapAddress) { + PHARDWARE_PTE PmlBase; ULONGLONG PmlIndex; + /* Initialize PML base pointer */ + PmlBase = (PHARDWARE_PTE)PageMap->PtePointer; + /* Check page map level */ if(PageMap->PageMapLevel == 5) { @@ -265,9 +270,10 @@ BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap, PmlIndex = (SelfMapAddress >> MM_PXI_SHIFT) & 0x1FF; /* Add self-mapping for PML4 */ - ((PHARDWARE_PTE)PageMap->PtePointer)[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE; - ((PHARDWARE_PTE)PageMap->PtePointer)[PmlIndex].Valid = 1; - ((PHARDWARE_PTE)PageMap->PtePointer)[PmlIndex].Writable = 1; + RtlZeroMemory(&PmlBase[PmlIndex], sizeof(HARDWARE_PTE)); + PmlBase[PmlIndex].PageFrameNumber = PmlBasePfn; + PmlBase[PmlIndex].Valid = 1; + PmlBase[PmlIndex].Writable = 1; } /* Return success */