From 5670398077a57dfc02f63e589055c5f167ab2523 Mon Sep 17 00:00:00 2001
From: Aiken Harris <harraiken91@gmail.com>
Date: Wed, 14 Aug 2024 13:03:05 +0200
Subject: [PATCH] update AP bootstrap code

---
 xtoskrnl/ar/amd64/archsmp.S | 59 ++++++++++++++++++++++++++++++++++++-
 xtoskrnl/hl/x86/cpu.c       |  5 ++++
 2 files changed, 63 insertions(+), 1 deletion(-)

diff --git a/xtoskrnl/ar/amd64/archsmp.S b/xtoskrnl/ar/amd64/archsmp.S
index c71d7fc..ac50bf1 100644
--- a/xtoskrnl/ar/amd64/archsmp.S
+++ b/xtoskrnl/ar/amd64/archsmp.S
@@ -12,17 +12,74 @@
 .text
 
 
+.global ArBootstrapPageMap
+
 .global ArStartApplicationProcessor
 ArStartApplicationProcessor:
     /* 16-bit code (real mode) */
     .code16
 
+    /* Turn off interrupts and clear direction flag */
     cli
     cld
-    hlt
+
+    /* Load temporary GDT */
+    lgdt (ArpApTemporaryGdtSize - ArStartApplicationProcessor + 0x1000)
+
+    /* Enable bit 0 in CR0 to enable Protected Mode */
+    movl %cr0, %eax
+    orl $0x1, %eax
+    movl %eax, %cr0
+
+    /* Long jump into 32bits */
+    ljmpl $0x8, $(ApplicationProcessor32 - ArStartApplicationProcessor + 0x1000)
 
     /* 32-bit code (protected mode) */
     .code32
+ApplicationProcessor32:
+
+    /* Fix segment registers */
+    mov $0x10, %ax
+    mov %ax, %ds
+    mov %ax, %es
+    mov %ax, %fs
+    mov %ax, %gs
+    mov %ax, %ss
+
+    /* Enable LM and NX in the EFER. */
+    mov $0xC0000080, %ecx
+    rdmsr
+    or $0x900, %eax
+    wrmsr
+
+    /* Enable PAE and PSE */
+    mov %cr4, %eax
+    or $0x668, %eax
+    mov %eax, %cr4
+
+    /* Install page map in CR3 */
+    mov (ArBootstrapPageMap - ArStartApplicationProcessor + 0x1000), %eax
+    mov %eax, %cr3
+
+    /* Enable paging */
+    mov %cr0, %eax
+    or $0x80010000, %eax
+    mov %eax, %cr0
+
+    /* Long jump into 64bits */
+    ljmpl $0x8, $(ApplicationProcessor64 - ArStartApplicationProcessor + 0x1000)
 
     /* 64-bit code (long mode) */
     .code64
+ApplicationProcessor64:
+
+    /* HALT CPU in long mode */
+    hlt
+
+.align 8
+ArpApTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00CF92000000FFFF, 0x00AF9A000000FFFF
+ArpApTemporaryGdtSize: .short ArpApTemporaryGdtSize - ArpApTemporaryGdtDesc - 1
+ArpApTemporaryGdtBase: .long ArpApTemporaryGdtDesc - ArStartApplicationProcessor + 0x1000
+ArBootstrapPageMap: .quad 0x0000000000000000
+
+ArStartApplicationProcessorEnd:
diff --git a/xtoskrnl/hl/x86/cpu.c b/xtoskrnl/hl/x86/cpu.c
index 4bec2db..986f779 100644
--- a/xtoskrnl/hl/x86/cpu.c
+++ b/xtoskrnl/hl/x86/cpu.c
@@ -79,6 +79,8 @@ HlStartProcessor(IN ULONG CpuId,
     return STATUS_SUCCESS;
 }
 
+extern ULONG_PTR ArBootstrapPageMap;
+
 XTAPI
 XTSTATUS
 HlStartAllProcessors(VOID)
@@ -95,6 +97,9 @@ HlStartAllProcessors(VOID)
     /* Check if at least one AP is present */
     if(HlpSystemInfo.CpuCount > 1)
     {
+        /* Save page map address in the bootstrap code */
+        ArBootstrapPageMap = ArReadControlRegister(3);
+
         /* Allocate 5 pages for AP bootstrap code and ensure it is low memory */
         Status = MmAllocateHardwareMemory(AP_SPINUP_PAGE_COUNT, FALSE, &ApPhysicalAddress);
         if(Status != STATUS_SUCCESS || ApPhysicalAddress.QuadPart > (0x100000 - AP_SPINUP_PAGE_COUNT * MM_PAGE_SIZE))