xt-sys/exectos
3
5
Fork 2
Code Issues 7 Pull Requests 1 Actions Projects 1 Releases Wiki Activity

Refactor memory layout structure
All checks were successful
Builds / ExectOS (amd64, release) (push) Successful in 29s
Details
Builds / ExectOS (amd64, debug) (push) Successful in 39s
Details
Builds / ExectOS (i686, debug) (push) Successful in 38s
Details
Builds / ExectOS (i686, release) (push) Successful in 28s
Details

Browse Source
This commit is contained in:
Aiken Harris
2026-01-29 22:10:26 +01:00
parent 72f34c8286
commit 58669d3074
10 changed files with 67 additions and 47 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
xtoskrnl/mm/amd64/mmgr.cc
View File

@@ -39,11 +39,11 @@ MM::Manager::InitializeMemoryLayout(VOID)
if(MM::Paging::GetXpaStatus())
{
/* Configure memory layout for 5-level paging, using 57bit address space and providing a 128 PB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFEFA8000000000ULL;
MemoryLayout.PfnDatabase = (PMMPFN)0xFFFEFA8000000000ULL;
MemoryLayout.SelfMapAddress = (PVOID)MM_P5E_LA57_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabase + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFEFFFFFFBFFFFFULL;
MemoryLayout.PagedPoolStart = (PVOID)0xFFFEF8A000000000ULL;
MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
@@ -51,18 +51,16 @@ MM::Manager::InitializeMemoryLayout(VOID)
/* Define hyperspace, system PTE space, and the user space limit */
MemoryLayout.HyperSpaceStart = (PVOID)0xFFFEF70000000000ULL;
MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFEF77FFFFFFFFFULL;
MemoryLayout.SystemSpaceStart = (PVOID)0xFFFEF88000000000ULL;
MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
MemoryLayout.UserSpaceEnd = (PVOID)0x07FFFFFFFFFFFFFULL;
}
else
{
/* Configure memory layout for 4-level paging, using 48bit address space and providing a 128 TB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFFFA8000000000ULL;
MemoryLayout.PfnDatabase = (PMMPFN)0xFFFFFA8000000000ULL;
MemoryLayout.SelfMapAddress = (PVOID)MM_PXE_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabase + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFFFFFFFFBFFFFFULL;
MemoryLayout.PagedPoolStart = (PVOID)0xFFFFF8A000000000ULL;
MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
@@ -70,8 +68,6 @@ MM::Manager::InitializeMemoryLayout(VOID)
/* Define hyperspace, system PTE space, and the user space limit */
MemoryLayout.HyperSpaceStart = (PVOID)0xFFFFF70000000000ULL;
MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFFF77FFFFFFFFFULL;
MemoryLayout.SystemSpaceStart = (PVOID)0xFFFFF88000000000ULL;
MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
MemoryLayout.UserSpaceEnd = (PVOID)0x000007FFFFFEFFFFULL;
}
}

10
xtoskrnl/mm/amd64/pfn.cc
View File

@@ -40,14 +40,14 @@ MM::Pfn::InitializePfnDatabase(VOID)
MemoryLayout = MM::Manager::GetMemoryLayout();
/* Get the PFN database size and calculate the end of the PFN database virtual address space */
PfnDatabaseEnd = (PUCHAR)MemoryLayout->PfnDatabaseAddress + (PfnDatabaseSize * MM_PAGE_SIZE) - 1;
PfnDatabaseEnd = (PUCHAR)MemoryLayout->PfnDatabase + (PfnDatabaseSize * MM_PAGE_SIZE) - 1;
/* Get a template PTE for mapping the PFN database pages */
ValidPte = MM::Pte::GetValidPte();
/* Map the Page Directory and Page Directory Pointer tables for the PFN database */
MM::Pte::MapPPE(MemoryLayout->PfnDatabaseAddress, PfnDatabaseEnd, ValidPte);
MM::Pte::MapPDE(MemoryLayout->PfnDatabaseAddress, PfnDatabaseEnd, ValidPte);
MM::Pte::MapPPE(MemoryLayout->PfnDatabase, PfnDatabaseEnd, ValidPte);
MM::Pte::MapPDE(MemoryLayout->PfnDatabase, PfnDatabaseEnd, ValidPte);
/* Initialize the color tables */
MM::Colors::InitializeColorTables();
@@ -80,8 +80,8 @@ MM::Pfn::InitializePfnDatabase(VOID)
}
/* Map PFN database entries for this physical range */
MM::Pte::MapPTE(&((PMMPFN)MemoryLayout->PfnDatabaseAddress)[BasePage],
(PUCHAR)&((PMMPFN)MemoryLayout->PfnDatabaseAddress)[BasePage + PageCount] - 1,
MM::Pte::MapPTE(&((PMMPFN)MemoryLayout->PfnDatabase)[BasePage],
(PUCHAR)&((PMMPFN)MemoryLayout->PfnDatabase)[BasePage + PageCount] - 1,
ValidPte);
/* Split PFN database allocation out of the free descriptor */

2
xtoskrnl/mm/amd64/pte.cc
View File

@@ -68,7 +68,7 @@ MM::Pte::GetSystemPteBaseAddress(VOID)
if(MM::Paging::GetXpaStatus())
{
/* For 5-level paging, system PTEs start at the beginning of system space */
return MM::Paging::GetPteAddress((PVOID)MemoryLayout->SystemSpaceStart);
return MM::Paging::GetPteAddress((PVOID)MemoryLayout->NonPagedSystemPoolStart);
}
else
{

2
xtoskrnl/mm/colors.cc
View File

@@ -131,7 +131,7 @@ MM::Colors::InitializeColorTables(VOID)
MemoryLayout = MM::Manager::GetMemoryLayout();
/* Set the base address of the color tables to start right after the PFN database */
FreePages[0] = (PMMCOLOR_TABLES)&((PMMPFN)MemoryLayout->PfnDatabaseAddress)[MM::Pfn::GetHighestPhysicalPage() + 1];
FreePages[0] = (PMMCOLOR_TABLES)&((PMMPFN)MemoryLayout->PfnDatabase)[MM::Pfn::GetHighestPhysicalPage() + 1];
/* Calculate the virtual address range for both color tables */
PointerPte = MM::Paging::GetPteAddress(&FreePages[0][0]);

12
xtoskrnl/mm/i686/mmgr.cc
View File

@@ -54,11 +54,11 @@ MM::Manager::InitializeMemoryLayout(VOID)
if(MM::Paging::GetXpaStatus())
{
/* Configure memory layout for 3-level paging, using 36bit address space and providing a 64 GB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xB0000000;
MemoryLayout.PfnDatabase = (PMMPFN)0xB0000000;
MemoryLayout.SelfMapAddress = (PVOID)MM_PTE_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabase + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolEnd = (PVOID)0xEEFFFFFF;
MemoryLayout.PagedPoolStart = (PVOID)0xE2000000;
MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
@@ -66,18 +66,16 @@ MM::Manager::InitializeMemoryLayout(VOID)
/* Define hyperspace, system PTE space, and the user space limit */
MemoryLayout.HyperSpaceStart = (PVOID)0xC0800000;
MemoryLayout.HyperSpaceEnd = (PVOID)0xC0BFFFFF;
MemoryLayout.SystemSpaceStart = (PVOID)0xC0C00000;
MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
MemoryLayout.UserSpaceEnd = (PVOID)0x7FFEFFFF;
}
else
{
/* Configure memory layout for 2-level paging, using 32bit address space and providing a 4 GB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xB0000000;
MemoryLayout.PfnDatabase = (PMMPFN)0xB0000000;
MemoryLayout.SelfMapAddress = (PVOID)MM_PTE_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabase + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFBE0000;
MemoryLayout.PagedPoolStart = (PVOID)0xE1000000;
MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
@@ -85,8 +83,6 @@ MM::Manager::InitializeMemoryLayout(VOID)
/* Define hyperspace, system PTE space, and the user space limit */
MemoryLayout.HyperSpaceStart = (PVOID)0xC0400000;
MemoryLayout.HyperSpaceEnd = (PVOID)0xC07FFFFF;
MemoryLayout.SystemSpaceStart = (PVOID)0xC0800000;
MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
MemoryLayout.UserSpaceEnd = (PVOID)0x7FFEFFFF;
}
}

8
xtoskrnl/mm/i686/pfn.cc
View File

@@ -39,17 +39,17 @@ MM::Pfn::InitializePfnDatabase(VOID)
MemoryLayout = MM::Manager::GetMemoryLayout();
/* Get the PFN database size and calculate the end of the PFN database virtual address space */
PfnDatabaseEnd = (PUCHAR)MemoryLayout->PfnDatabaseAddress + (PfnDatabaseSize * MM_PAGE_SIZE) - 1;
PfnDatabaseEnd = (PUCHAR)MemoryLayout->PfnDatabase + (PfnDatabaseSize * MM_PAGE_SIZE) - 1;
/* Get a template PTE for mapping the PFN database pages */
ValidPte = MM::Pte::GetValidPte();
/* Map the Page Directory and Page Directory Pointer tables for the PFN database */
MM::Pte::MapPDE(MemoryLayout->PfnDatabaseAddress, PfnDatabaseEnd, ValidPte);
MM::Pte::MapPTE(MemoryLayout->PfnDatabaseAddress, PfnDatabaseEnd, ValidPte);
MM::Pte::MapPDE(MemoryLayout->PfnDatabase, PfnDatabaseEnd, ValidPte);
MM::Pte::MapPTE(MemoryLayout->PfnDatabase, PfnDatabaseEnd, ValidPte);
/* Zero PFN database virtual space */
RTL::Memory::ZeroMemory(MemoryLayout->PfnDatabaseAddress, PfnDatabaseSize * MM_PAGE_SIZE);
RTL::Memory::ZeroMemory(MemoryLayout->PfnDatabase, PfnDatabaseSize * MM_PAGE_SIZE);
/* Initialize the color tables */
MM::Colors::InitializeColorTables();

2
xtoskrnl/mm/i686/pte.cc
View File

@@ -98,7 +98,7 @@ MM::Pte::InitializePageTable(VOID)
MM::Paging::SetPte(&TemplatePte, 0, MM_PTE_READWRITE | MM_PTE_CACHE_ENABLE);
/* Map the kernel's PD entries */
MM::Pte::MapPDE(MemoryLayout->SystemSpaceStart, (PVOID)MM_HIGHEST_SYSTEM_ADDRESS, &TemplatePte);
MM::Pte::MapPDE(MemoryLayout->NonPagedSystemPoolStart, (PVOID)MM_HIGHEST_SYSTEM_ADDRESS, &TemplatePte);
}
/**

24
xtoskrnl/mm/pfn.cc
View File

@@ -415,7 +415,7 @@ MM::Pfn::GetPfnEntry(IN PFN_NUMBER Pfn)
MemoryLayout = MM::Manager::GetMemoryLayout();
/* Calculate the address of the PFN entry by indexing into the PFN database array and return it */
return &((PMMPFN)MemoryLayout->PfnDatabaseAddress)[Pfn];
return &((PMMPFN)MemoryLayout->PfnDatabase)[Pfn];
}
/**
@@ -531,7 +531,7 @@ MM::Pfn::LinkFreePage(IN PFN_NUMBER PageFrameIndex)
/* Link with the previous last page */
MM::Paging::SetPte(&ColoredPfn->OriginalPte, PageFrameIndex);
PfnEntry->u4.PteFrame = ColoredPfn - (PMMPFN)MemoryLayout->PfnDatabaseAddress;
PfnEntry->u4.PteFrame = ColoredPfn - (PMMPFN)MemoryLayout->PfnDatabase;
}
/* Set the page as the new tail of the colored list */
@@ -570,7 +570,7 @@ MM::Pfn::LinkPage(IN PMMPFNLIST ListHead,
PMMMEMORY_LAYOUT MemoryLayout = MM::Manager::GetMemoryLayout();
/* Get the PFN database entry for the target page */
PageFrame = &((PMMPFN)MemoryLayout->PfnDatabaseAddress)[PageFrameIndex];
PageFrame = &((PMMPFN)MemoryLayout->PfnDatabase)[PageFrameIndex];
/* Get the list name */
ListName = ListHead->ListName;
@@ -598,7 +598,7 @@ MM::Pfn::LinkPage(IN PMMPFNLIST ListHead,
if(ListHead->Blink != MAXULONG_PTR)
{
/* Update the previous tail to point to this page */
(&((PMMPFN)MemoryLayout->PfnDatabaseAddress)[ListHead->Blink])->u1.Flink = PageFrameIndex;
(&((PMMPFN)MemoryLayout->PfnDatabase)[ListHead->Blink])->u1.Flink = PageFrameIndex;
}
else
{
@@ -661,7 +661,7 @@ MM::Pfn::LinkPage(IN PMMPFNLIST ListHead,
if(ListHead->Flink != MAXULONG_PTR)
{
/* Fix up the backward link of the old head */
(&((PMMPFN)MemoryLayout->PfnDatabaseAddress)[ListHead->Flink])->u2.Blink = PageFrameIndex;
(&((PMMPFN)MemoryLayout->PfnDatabase)[ListHead->Flink])->u2.Blink = PageFrameIndex;
}
else
{
@@ -675,7 +675,7 @@ MM::Pfn::LinkPage(IN PMMPFNLIST ListHead,
if(ListHead->Blink != MAXULONG_PTR)
{
/* Link the current tail to the new page */
(&((PMMPFN)MemoryLayout->PfnDatabaseAddress)[ListHead->Blink])->u1.Flink = PageFrameIndex;
(&((PMMPFN)MemoryLayout->PfnDatabase)[ListHead->Blink])->u1.Flink = PageFrameIndex;
}
else
{
@@ -714,7 +714,7 @@ MM::Pfn::LinkPage(IN PMMPFNLIST ListHead,
if(ColorHead->Flink != MAXULONG_PTR)
{
/* Fix up the PTE frame of the previous entry */
(&((PMMPFN)MemoryLayout->PfnDatabaseAddress)[ColorHead->Flink])->u4.PteFrame = PageFrameIndex;
(&((PMMPFN)MemoryLayout->PfnDatabase)[ColorHead->Flink])->u4.PteFrame = PageFrameIndex;
}
else
{
@@ -817,7 +817,7 @@ MM::Pfn::LinkPfnToPte(IN PFN_NUMBER PageFrameIndex,
MemoryLayout = MM::Manager::GetMemoryLayout();
/* Point the PFN to its PTE */
Pfn = &((PMMPFN)MemoryLayout->PfnDatabaseAddress)[PageFrameIndex];
Pfn = &((PMMPFN)MemoryLayout->PfnDatabase)[PageFrameIndex];
Pfn->PteAddress = PointerPte;
/* Check if the page is already mapped and in use */
@@ -860,7 +860,7 @@ MM::Pfn::LinkPfnToPte(IN PFN_NUMBER PageFrameIndex,
Pfn->u4.PteFrame = PageFrameIndex;
/* Pin the page table in memory by incrementing its PFN share count */
Pfn = &((PMMPFN)MemoryLayout->PfnDatabaseAddress)[PageFrameIndex];
Pfn = &((PMMPFN)MemoryLayout->PfnDatabase)[PageFrameIndex];
Pfn->u2.ShareCount++;
}
@@ -887,7 +887,7 @@ MM::Pfn::LinkStandbyPage(IN PFN_NUMBER PageFrameIndex)
MemoryLayout = MM::Manager::GetMemoryLayout();
/* Get the PFN database entry for the target page */
CurrentPageFrame = &((PMMPFN)MemoryLayout->PfnDatabaseAddress)[PageFrameIndex];
CurrentPageFrame = &((PMMPFN)MemoryLayout->PfnDatabase)[PageFrameIndex];
/* Check if the page is part of a ROM image */
if(CurrentPageFrame->u3.e1.Rom == 1)
@@ -899,7 +899,7 @@ MM::Pfn::LinkStandbyPage(IN PFN_NUMBER PageFrameIndex)
if(RomPagesList.Blink != (ULONG_PTR)-1)
{
/* Update the old tail to point to the new page */
AdjacentPageFrame = &((PMMPFN)MemoryLayout->PfnDatabaseAddress)[RomPagesList.Blink];
AdjacentPageFrame = &((PMMPFN)MemoryLayout->PfnDatabase)[RomPagesList.Blink];
AdjacentPageFrame->u1.Flink = PageFrameIndex;
}
else
@@ -933,7 +933,7 @@ MM::Pfn::LinkStandbyPage(IN PFN_NUMBER PageFrameIndex)
if(Flink != MAXULONG_PTR)
{
/* Update the old head to point to the new page */
AdjacentPageFrame = &((PMMPFN)MemoryLayout->PfnDatabaseAddress)[Flink];
AdjacentPageFrame = &((PMMPFN)MemoryLayout->PfnDatabase)[Flink];
AdjacentPageFrame->u2.Blink = PageFrameIndex;
}
else

8
xtoskrnl/mm/pte.cc
View File

@@ -199,15 +199,15 @@ MM::Pte::InitializeSystemPteSpace(VOID)
/* Retrieve the system's memory layout */
MemoryLayout = MM::Manager::GetMemoryLayout();
NonPagedSystemPoolEnd = ((ULONGLONG)MemoryLayout->SystemSpaceStart +
NonPagedSystemPoolEnd = ((ULONGLONG)MemoryLayout->NonPagedSystemPoolStart +
MM::Manager::GetNumberOfSystemPtes() * MM_PAGE_SIZE);
/* Map the page table hierarchy for the entire system PTE space */
MM::Pte::MapPPE(MemoryLayout->SystemSpaceStart, (PVOID)NonPagedSystemPoolEnd, &ValidPte);
MM::Pte::MapPDE(MemoryLayout->SystemSpaceStart, (PVOID)NonPagedSystemPoolEnd, &ValidPte);
MM::Pte::MapPPE(MemoryLayout->NonPagedSystemPoolStart, (PVOID)NonPagedSystemPoolEnd, &ValidPte);
MM::Pte::MapPDE(MemoryLayout->NonPagedSystemPoolStart, (PVOID)NonPagedSystemPoolEnd, &ValidPte);
/* Format the main block of system PTEs into a free list pool */
PointerPte = MM::Paging::GetPteAddress(MemoryLayout->SystemSpaceStart);
PointerPte = MM::Paging::GetPteAddress(MemoryLayout->NonPagedSystemPoolStart);
InitializeSystemPtePool(PointerPte, MM::Manager::GetNumberOfSystemPtes(), SystemPteSpace);