Update timer subsystem with multi-backend dispatch table

sdk/xtdk/amd64/hltypes.h

@@ -307,6 +307,17 @@ typedef enum _PIC_I8259_ICW4_SYSTEM_MODE
     New8086Mode
 } PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
 
+/* Supported hardware timer backends */
+typedef enum _TIMER_TYPE
+{
+    TimerNone,
+    TimerAcpiPm,
+    TimerHpet,
+    TimerLapic,
+    TimerPit,
+    TimerTsc
+} TIMER_TYPE, *PTIMER_TYPE;
+
 /* APIC Base Register */
 typedef union _APIC_BASE_REGISTER
 {
@@ -500,6 +511,7 @@ typedef struct _HPET_REGISTERS
     } Timers[];
 } HPET_REGISTERS, *PHPET_REGISTERS;
 
+/* Hardware timer capabilities and CPU clock features */
 typedef struct _TIMER_CAPABILITIES
 {
     BOOLEAN Arat;

sdk/xtdk/amd64/ketypes.h

@@ -497,6 +497,7 @@ typedef struct _KPROCESSOR_CONTROL_BLOCK
     ULONG_PTR MultiThreadProcessorSet;
     SINGLE_LIST_ENTRY DeferredReadyListHead;
     PROCESSOR_POWER_STATE PowerState;
+    ULONG ProfilingCountdown;
 } KPROCESSOR_CONTROL_BLOCK, *PKPROCESSOR_CONTROL_BLOCK;
 
 /* Processor Block structure definition */

sdk/xtdk/amd64/xtstruct.h

@@ -37,6 +37,7 @@ typedef enum _PIC_I8259_ICW1_OPERATING_MODE PIC_I8259_ICW1_OPERATING_MODE, *PPIC
 typedef enum _PIC_I8259_ICW4_BUFFERED_MODE PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
 typedef enum _PIC_I8259_ICW4_EOI_MODE PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
 typedef enum _PIC_I8259_ICW4_SYSTEM_MODE PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
+typedef enum _TIMER_TYPE TIMER_TYPE, *PTIMER_TYPE;
 typedef enum _TRAMPOLINE_TYPE TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
 
 /* Architecture-specific structures forward references */