Update timer subsystem with multi-backend dispatch table
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This commit is contained in:
2026-05-07 19:50:37 +02:00
parent 4cb5b12e68
commit 689951cfde
11 changed files with 1243 additions and 113 deletions

View File

@@ -9,59 +9,104 @@
#include <xtos.hh>
/* ACPI tables cache count */
/* Tracks the total number of currently cached ACPI tables */
ULONG HL::Acpi::CacheCount = 0;
/* ACPI tables cache entries */
/* Array holding the cached ACPI tables */
ACPI_CACHE_LIST HL::Acpi::CacheEntries[ACPI_MAX_CACHED_TABLES];
/* ACPI tables cache list */
/* Head of the linked list tracking dynamically mapped ACPI tables */
LIST_ENTRY HL::Acpi::CacheList;
/* ACPI Root System Description Pointer (RSDP) */
/* Pointer to the ACPI Root System Description Pointer (RSDP) */
PACPI_RSDP HL::Acpi::RsdpStructure;
/* System information */
/* Global architectural system states and hardware feature flags parsed from the ACPI tables */
ACPI_SYSTEM_INFO HL::Acpi::SystemInfo;
/* ACPI timer information */
/* Hardware configuration details and port addresses for the ACPI Power Management Timer */
ACPI_TIMER_INFO HL::Acpi::TimerInfo;
/* Active processors count */
/* Represents the number of active processors */
KAFFINITY HL::Cpu::ActiveProcessors;
/* FrameBuffer information */
/* Metadata detailing the linear frame buffer geometry */
HL_FRAMEBUFFER_DATA HL::FrameBuffer::FrameBufferData;
/* Pointer to the RAM shadow buffer used for double-buffered rendering */
PVOID HL::FrameBuffer::ScreenShadowBuffer;
/* Scroll region information */
/* Tracks the bounding box, dimensions, and cursor position for the kernel video console */
HL_SCROLL_REGION_DATA HL::FrameBuffer::ScrollRegionData;
/* APIC mode */
/* Indicates the active hardware interrupt controller mode */
APIC_MODE HL::Pic::ApicMode;
/* Number of I/O APIC controllers */
/* Total number of I/O APIC chips discovered and initialized */
ULONG HL::Pic::ControllerCount;
/* I/O APIC controllers information */
/* Array containing MMIO bases, IDs, and line counts for all I/O APICs */
IOAPIC_DATA HL::Pic::Controllers[IOAPIC_MAX_CONTROLLERS];
/* Number of I/O APIC overrides */
/* Total number of legacy ISA interrupt routing overrides */
ULONG HL::Pic::IrqOverrideCount;
/* I/O APIC overrides information */
/* Hardware routing definitions mapping legacy ISA interrupts to Global System Interrupts (GSI) */
ACPI_MADT_INTERRUPT_OVERRIDE HL::Pic::IrqOverrides[IOAPIC_MAX_OVERRIDES];
/* Mapped interrupt vectors */
/* Lookup table mapping allocated hardware APIC vectors to their assigned Run Levels */
UCHAR HL::Pic::MappedVectors[256];
/* Kernel profiling interval */
ULONG HL::Timer::ProfilingInterval;
/* Accumulated tick value of the ACPI Power Management Timer */
ULONG HL::Timer::AcpiPmPerformanceCounter = 0;
/* Primary hardware timer driving the periodic system clock interrupt */
TIMER_TYPE HL::Timer::ClockType;
/* Fractional remainder used to maintain long-term system clock accuracy */
ULONG HL::Timer::FractionalIncrement = 0;
/* Virtual address mapped to the HPET hardware MMIO registers */
PVOID HL::Timer::HpetAddress = NULLPTR;
/* Operating frequency of the High Precision Event Timer in ticks per second */
ULONGLONG HL::Timer::HpetFrequency = 0;
/* Spinlock protecting concurrent multiprocessor access to the global performance counters */
KSPIN_LOCK HL::Timer::PerformanceCounterLock;
/* The performance counter frequency in ticks per second */
ULONGLONG HL::Timer::PerformanceFrequency = 0;
/* Absolute monotonic tick count driven by the legacy Programmable Interval Timer */
ULONGLONG HL::Timer::PitPerformanceCounter;
/* Programmed hardware divider interval used to increment the PIT performance counter */
ULONG HL::Timer::PitRollover;
/* Flag indicating whether statistical system execution profiling is currently active */
BOOLEAN HL::Timer::ProfilingEnabled = FALSE;
/* Tick interval required to trigger a profile interrupt */
ULONG HL::Timer::ProfilingTicks;
/* Global accumulator for fractional time drift and precision compensation */
ULONG HL::Timer::RunningFraction = 0;
/* System counter driven by the highest precision available hardware */
ULONGLONG HL::Timer::SystemPerformanceCounter;
/* Current base clock increment in standard 100-nanosecond intervals */
ULONG HL::Timer::TimeIncrement = 0;
/* Timer capabilities */
TIMER_CAPABILITIES HL::Timer::TimerCapabilities = {0};
/* APIC timer frequency */
ULONG HL::Timer::TimerFrequency;
/* Function dispatch table for the active hardware timer backend */
TIMER_ROUTINES HL::Timer::TimerRoutines = {0};
/* Identifies the hardware timer backing */
TIMER_TYPE HL::Timer::TimerType;

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