Update timer subsystem with multi-backend dispatch table
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This commit is contained in:
2026-05-07 19:50:37 +02:00
parent 4cb5b12e68
commit 689951cfde
11 changed files with 1243 additions and 113 deletions

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@@ -307,6 +307,17 @@ typedef enum _PIC_I8259_ICW4_SYSTEM_MODE
New8086Mode
} PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
/* Supported hardware timer backends */
typedef enum _TIMER_TYPE
{
TimerNone,
TimerAcpiPm,
TimerHpet,
TimerLapic,
TimerPit,
TimerTsc
} TIMER_TYPE, *PTIMER_TYPE;
/* APIC Base Register */
typedef union _APIC_BASE_REGISTER
{
@@ -500,6 +511,7 @@ typedef struct _HPET_REGISTERS
} Timers[];
} HPET_REGISTERS, *PHPET_REGISTERS;
/* Hardware timer capabilities and CPU clock features */
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;

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@@ -497,6 +497,7 @@ typedef struct _KPROCESSOR_CONTROL_BLOCK
ULONG_PTR MultiThreadProcessorSet;
SINGLE_LIST_ENTRY DeferredReadyListHead;
PROCESSOR_POWER_STATE PowerState;
ULONG ProfilingCountdown;
} KPROCESSOR_CONTROL_BLOCK, *PKPROCESSOR_CONTROL_BLOCK;
/* Processor Block structure definition */

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@@ -37,6 +37,7 @@ typedef enum _PIC_I8259_ICW1_OPERATING_MODE PIC_I8259_ICW1_OPERATING_MODE, *PPIC
typedef enum _PIC_I8259_ICW4_BUFFERED_MODE PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
typedef enum _PIC_I8259_ICW4_EOI_MODE PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
typedef enum _PIC_I8259_ICW4_SYSTEM_MODE PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
typedef enum _TIMER_TYPE TIMER_TYPE, *PTIMER_TYPE;
typedef enum _TRAMPOLINE_TYPE TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
/* Architecture-specific structures forward references */

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@@ -188,14 +188,33 @@
#define COMPORT_REG_MSR 0x06 /* Modem Status Register */
#define COMPORT_REG_SR 0x07 /* Scratch Register */
/* Standard system clock rates (in 100-nanosecond units)*/
#define HL_CLOCK_RATE_1000HZ 10000 /* 1 ms (1000 Hz) - Best Performance */
#define HL_CLOCK_RATE_500HZ 20000 /* 2 ms (500 Hz) - High Responsiveness */
#define HL_CLOCK_RATE_300HZ 33333 /* 3.33ms (300 Hz) - Multimedia Sync */
#define HL_CLOCK_RATE_250HZ 40000 /* 4 ms (250 Hz) - Optimal Balance */
#define HL_CLOCK_RATE_100HZ 100000 /* 10 ms (100 Hz) - Power Saving */
#define HL_CLOCK_RATE_50HZ 200000 /* 20 ms (50 Hz) - Deep Power Saving */
/* Minimum and maximum system clock rate definitions */
#define HL_MINIMUM_CLOCK_RATE HL_CLOCK_RATE_1000HZ
#define HL_MAXIMUM_CLOCK_RATE HL_CLOCK_RATE_50HZ
/* Minimum and maximum profile intervals */
#define MIN_PROFILE_INTERVAL 10000
#define MAX_PROFILE_INTERVAL 10000000
#define MIN_PROFILE_INTERVAL 10000
#define MAX_PROFILE_INTERVAL 10000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware Layer routine callbacks */
typedef XTSTATUS (XTAPI *PHALP_INITIALIZE_CLOCK)(VOID);
typedef ULONGLONG (XTAPI *PHALP_QUERY_PERF_COUNTER)(VOID);
typedef ULONG (XTAPI *PHALP_QUERY_TIME_DELTA)(VOID);
typedef ULONG (XTAPI *PHALP_SET_CLOCK_RATE)(IN ULONG Increment);
typedef VOID (XTAPI *PHALP_STALL_EXECUTION)(IN ULONG MicroSeconds);
/* Generic Address structure */
typedef struct _GENERIC_ADDRESS
{
@@ -498,5 +517,15 @@ typedef struct _SMBIOS3_TABLE_HEADER
ULONGLONG TableAddress;
} SMBIOS3_TABLE_HEADER, *PSMBIOS3_TABLE_HEADER;
/* Timer dispatch table */
typedef struct _TIMER_ROUTINES
{
PHALP_INITIALIZE_CLOCK InitializeClock;
PHALP_QUERY_PERF_COUNTER QueryPerformanceCounter;
PHALP_QUERY_TIME_DELTA QueryTimeDelta;
PHALP_SET_CLOCK_RATE SetClockRate;
PHALP_STALL_EXECUTION StallExecution;
} TIMER_ROUTINES, *PTIMER_ROUTINES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_HLTYPES_H */

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@@ -315,6 +315,17 @@ typedef enum _PIC_I8259_ICW4_SYSTEM_MODE
New8086Mode
} PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
/* Supported hardware timer backends */
typedef enum _TIMER_TYPE
{
TimerNone,
TimerAcpiPm,
TimerHpet,
TimerLapic,
TimerPit,
TimerTsc
} TIMER_TYPE, *PTIMER_TYPE;
/* APIC Base Register */
typedef union _APIC_BASE_REGISTER
{
@@ -508,7 +519,7 @@ typedef struct _HPET_REGISTERS
} Timers[];
} HPET_REGISTERS, *PHPET_REGISTERS;
/* Timer Capabilities */
/* Hardware timer capabilities and CPU clock features */
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;

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@@ -456,6 +456,7 @@ typedef struct _KPROCESSOR_CONTROL_BLOCK
VOLATILE ULONG_PTR TimerRequest;
SINGLE_LIST_ENTRY DeferredReadyListHead;
PROCESSOR_POWER_STATE PowerState;
ULONG ProfilingCountdown;
} KPROCESSOR_CONTROL_BLOCK, *PKPROCESSOR_CONTROL_BLOCK;
/* Processor Block structure definition */

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@@ -37,6 +37,7 @@ typedef enum _PIC_I8259_ICW1_OPERATING_MODE PIC_I8259_ICW1_OPERATING_MODE, *PPIC
typedef enum _PIC_I8259_ICW4_BUFFERED_MODE PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
typedef enum _PIC_I8259_ICW4_EOI_MODE PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
typedef enum _PIC_I8259_ICW4_SYSTEM_MODE PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
typedef enum _TIMER_TYPE TIMER_TYPE, *PTIMER_TYPE;
typedef enum _TRAMPOLINE_TYPE TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
/* Architecture-specific structures forward references */

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@@ -338,6 +338,7 @@ typedef struct _STRING32 STRING32, *PSTRING32;
typedef struct _STRING64 STRING64, *PSTRING64;
typedef struct _THREAD_INFORMATION_BLOCK THREAD_INFORMATION_BLOCK, *PTHREAD_INFORMATION_BLOCK;
typedef struct _TIME_FIELDS TIME_FIELDS, *PTIME_FIELDS;
typedef struct _TIMER_ROUTINES TIMER_ROUTINES, *PTIMER_ROUTINES;
typedef struct _UEFI_FIRMWARE_INFORMATION UEFI_FIRMWARE_INFORMATION, *PUEFI_FIRMWARE_INFORMATION;
typedef struct _UNICODE_STRING UNICODE_STRING, *PUNICODE_STRING;
typedef struct _UNICODE_STRING32 UNICODE_STRING32, *PUNICODE_STRING32;
@@ -359,7 +360,6 @@ typedef struct _XTBL_MODULE_AUTHORS XTBL_MODULE_AUTHORS, *PXTBL_MODULE_AUTHORS;
typedef struct _XTBL_MODULE_DEPS XTBL_MODULE_DEPS, *PXTBL_MODULE_DEPS;
typedef struct _XTBL_MODULE_INFO XTBL_MODULE_INFO, *PXTBL_MODULE_INFO;
typedef struct _XTBL_PAGE_MAPPING XTBL_PAGE_MAPPING, *PXTBL_PAGE_MAPPING;
typedef struct _XTBL_SHELL_COMMAND XTBL_SHELL_COMMAND, *PXTBL_SHELL_COMMAND;
typedef struct _XTBL_STATUS XTBL_STATUS, *PXTBL_STATUS;
/* Unions forward references */

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@@ -9,59 +9,104 @@
#include <xtos.hh>
/* ACPI tables cache count */
/* Tracks the total number of currently cached ACPI tables */
ULONG HL::Acpi::CacheCount = 0;
/* ACPI tables cache entries */
/* Array holding the cached ACPI tables */
ACPI_CACHE_LIST HL::Acpi::CacheEntries[ACPI_MAX_CACHED_TABLES];
/* ACPI tables cache list */
/* Head of the linked list tracking dynamically mapped ACPI tables */
LIST_ENTRY HL::Acpi::CacheList;
/* ACPI Root System Description Pointer (RSDP) */
/* Pointer to the ACPI Root System Description Pointer (RSDP) */
PACPI_RSDP HL::Acpi::RsdpStructure;
/* System information */
/* Global architectural system states and hardware feature flags parsed from the ACPI tables */
ACPI_SYSTEM_INFO HL::Acpi::SystemInfo;
/* ACPI timer information */
/* Hardware configuration details and port addresses for the ACPI Power Management Timer */
ACPI_TIMER_INFO HL::Acpi::TimerInfo;
/* Active processors count */
/* Represents the number of active processors */
KAFFINITY HL::Cpu::ActiveProcessors;
/* FrameBuffer information */
/* Metadata detailing the linear frame buffer geometry */
HL_FRAMEBUFFER_DATA HL::FrameBuffer::FrameBufferData;
/* Pointer to the RAM shadow buffer used for double-buffered rendering */
PVOID HL::FrameBuffer::ScreenShadowBuffer;
/* Scroll region information */
/* Tracks the bounding box, dimensions, and cursor position for the kernel video console */
HL_SCROLL_REGION_DATA HL::FrameBuffer::ScrollRegionData;
/* APIC mode */
/* Indicates the active hardware interrupt controller mode */
APIC_MODE HL::Pic::ApicMode;
/* Number of I/O APIC controllers */
/* Total number of I/O APIC chips discovered and initialized */
ULONG HL::Pic::ControllerCount;
/* I/O APIC controllers information */
/* Array containing MMIO bases, IDs, and line counts for all I/O APICs */
IOAPIC_DATA HL::Pic::Controllers[IOAPIC_MAX_CONTROLLERS];
/* Number of I/O APIC overrides */
/* Total number of legacy ISA interrupt routing overrides */
ULONG HL::Pic::IrqOverrideCount;
/* I/O APIC overrides information */
/* Hardware routing definitions mapping legacy ISA interrupts to Global System Interrupts (GSI) */
ACPI_MADT_INTERRUPT_OVERRIDE HL::Pic::IrqOverrides[IOAPIC_MAX_OVERRIDES];
/* Mapped interrupt vectors */
/* Lookup table mapping allocated hardware APIC vectors to their assigned Run Levels */
UCHAR HL::Pic::MappedVectors[256];
/* Kernel profiling interval */
ULONG HL::Timer::ProfilingInterval;
/* Accumulated tick value of the ACPI Power Management Timer */
ULONG HL::Timer::AcpiPmPerformanceCounter = 0;
/* Primary hardware timer driving the periodic system clock interrupt */
TIMER_TYPE HL::Timer::ClockType;
/* Fractional remainder used to maintain long-term system clock accuracy */
ULONG HL::Timer::FractionalIncrement = 0;
/* Virtual address mapped to the HPET hardware MMIO registers */
PVOID HL::Timer::HpetAddress = NULLPTR;
/* Operating frequency of the High Precision Event Timer in ticks per second */
ULONGLONG HL::Timer::HpetFrequency = 0;
/* Spinlock protecting concurrent multiprocessor access to the global performance counters */
KSPIN_LOCK HL::Timer::PerformanceCounterLock;
/* The performance counter frequency in ticks per second */
ULONGLONG HL::Timer::PerformanceFrequency = 0;
/* Absolute monotonic tick count driven by the legacy Programmable Interval Timer */
ULONGLONG HL::Timer::PitPerformanceCounter;
/* Programmed hardware divider interval used to increment the PIT performance counter */
ULONG HL::Timer::PitRollover;
/* Flag indicating whether statistical system execution profiling is currently active */
BOOLEAN HL::Timer::ProfilingEnabled = FALSE;
/* Tick interval required to trigger a profile interrupt */
ULONG HL::Timer::ProfilingTicks;
/* Global accumulator for fractional time drift and precision compensation */
ULONG HL::Timer::RunningFraction = 0;
/* System counter driven by the highest precision available hardware */
ULONGLONG HL::Timer::SystemPerformanceCounter;
/* Current base clock increment in standard 100-nanosecond intervals */
ULONG HL::Timer::TimeIncrement = 0;
/* Timer capabilities */
TIMER_CAPABILITIES HL::Timer::TimerCapabilities = {0};
/* APIC timer frequency */
ULONG HL::Timer::TimerFrequency;
/* Function dispatch table for the active hardware timer backend */
TIMER_ROUTINES HL::Timer::TimerRoutines = {0};
/* Identifies the hardware timer backing */
TIMER_TYPE HL::Timer::TimerType;

File diff suppressed because it is too large Load Diff

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@@ -18,22 +18,56 @@ namespace HL
class Timer
{
private:
STATIC ULONG ProfilingInterval;
STATIC ULONG AcpiPmPerformanceCounter;
STATIC TIMER_TYPE ClockType;
STATIC ULONG FractionalIncrement;
STATIC PVOID HpetAddress;
STATIC ULONGLONG HpetFrequency;
STATIC KSPIN_LOCK PerformanceCounterLock;
STATIC ULONGLONG PerformanceFrequency;
STATIC ULONGLONG PitPerformanceCounter;
STATIC ULONG PitRollover;
STATIC BOOLEAN ProfilingEnabled;
STATIC ULONG ProfilingTicks;
STATIC ULONG RunningFraction;
STATIC ULONGLONG SystemPerformanceCounter;
STATIC ULONG TimeIncrement;
STATIC TIMER_CAPABILITIES TimerCapabilities;
STATIC ULONG TimerFrequency;
STATIC TIMER_ROUTINES TimerRoutines;
STATIC TIMER_TYPE TimerType;
public:
STATIC XTAPI VOID InitializeTimer(VOID);
STATIC XTAPI LARGE_INTEGER QueryPerformanceCounter(OUT PLARGE_INTEGER PerformanceFrequency);
STATIC XTAPI ULONG SetClockRate(IN ULONG Rate);
STATIC XTAPI ULONG_PTR SetProfileInterval(IN ULONG_PTR Interval);
STATIC XTAPI VOID StallExecution(IN ULONG MicroSeconds);
STATIC XTAPI VOID StartProfileInterrupt(IN KPROFILE_SOURCE ProfileSource);
STATIC XTAPI VOID StopProfileInterrupt(IN KPROFILE_SOURCE ProfileSource);
private:
STATIC XTAPI XTSTATUS CalibrateApicTimer();
STATIC XTAPI VOID InitializeApicTimer(VOID);
STATIC XTAPI VOID PitStallExecution(IN ULONG MicroSeconds);
STATIC XTAPI ULONGLONG CalibrateTscCounter(VOID);
STATIC XTAPI VOID ConfigureTimeIncrement(IN ULONGLONG BaseFrequency,
IN ULONGLONG HardwareDivider);
STATIC XTAPI XTSTATUS DetectHpet(VOID);
STATIC XTCDECL VOID HandleClockInterrupt(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleClockIpiInterrupt(IN PKTRAP_FRAME TrapFrame);
STATIC XTAPI XTSTATUS InitializeApicTimer(VOID);
STATIC XTAPI XTSTATUS InitializeHpetTimer(VOID);
STATIC XTAPI XTSTATUS InitializePitTimer(VOID);
STATIC XTAPI VOID ProbeTimerType(VOID);
STATIC XTAPI ULONGLONG QueryPerformanceCounterAcpiPm(VOID);
STATIC XTAPI ULONGLONG QueryPerformanceCounterHpet(VOID);
STATIC XTAPI ULONGLONG QueryPerformanceCounterPit(VOID);
STATIC XTAPI ULONGLONG QueryPerformanceCounterTsc(VOID);
STATIC XTAPI VOID QueryTimerCapabilities(VOID);
STATIC XTAPI VOID StallExecution(IN ULONG MicroSeconds);
STATIC XTAPI ULONG SetClockRateApic(ULONG TargetIncrement);
STATIC XTAPI VOID StallExecutionAcpiPm(IN ULONG MicroSeconds);
STATIC XTAPI VOID StallExecutionPit(IN ULONG MicroSeconds);
STATIC XTAPI BOOLEAN ValidateTimerSupport(IN TIMER_TYPE TimerType,
IN BOOLEAN IsClock);
};
}