Register APIC error handler and stub broadcast IPI for uniprocessor
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@@ -4,6 +4,7 @@
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* FILE: xtoskrnl/hl/x86/pic.cc
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* DESCRIPTION: Programmable Interrupt Controller (PIC) for x86 (i686/AMD64) support
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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* Aiken Harris <harraiken91@gmail.com>
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*/
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#include <xtos.hh>
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@@ -314,6 +315,33 @@ HL::Pic::GetIoApicController(IN ULONG Gsi,
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return STATUS_NOT_FOUND;
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}
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/**
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* Services the APIC Error interrupt, invoked when the APIC detects an internal hardware or message passing error.
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*
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* @param TrapFrame
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* Supplies a pointer to the hardware trap frame representing the interrupted execution context.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTCDECL
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VOID
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HL::Pic::HandleApicErrorInterrupt(IN PKTRAP_FRAME TrapFrame)
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{
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ULONG ErrorStatus;
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/* Write 0 to the ESR register to trigger an internal state update, then read the latched status */
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WriteApicRegister(APIC_ESR, 0);
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ErrorStatus = (ULONG)ReadApicRegister(APIC_ESR);
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/* Log the detected hardware error */
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DebugPrint(L"Caught APIC Error interrupt with ESR = 0x%08X\n", ErrorStatus);
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/* Acknowledge the interrupt to allow further interrupt delivery */
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SendEoi();
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}
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/**
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* Initializes the APIC interrupt controller.
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*
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@@ -416,8 +444,9 @@ HL::Pic::InitializeApic(VOID)
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WriteApicRegister(APIC_LINT1, LvtRegister.Long);
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/* Register interrupt handlers */
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HL::Irq::RegisterInterruptHandler(APIC_VECTOR_SPURIOUS, (PVOID)ArHandleSpuriousInterrupt);
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HL::Irq::RegisterSystemInterruptHandler(APIC_VECTOR_ERROR, HandleApicErrorInterrupt);
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HL::Irq::RegisterSystemInterruptHandler(APIC_VECTOR_PROFILE, HL::Irq::HandleProfileInterrupt);
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HL::Irq::RegisterInterruptHandler(APIC_VECTOR_SPURIOUS, (PVOID)ArHandleSpuriousInterrupt);
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/* Clear any pre-existing errors */
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WriteApicRegister(APIC_ESR, 0);
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@@ -718,6 +747,7 @@ HL::Pic::ResolveInterruptOverride(IN UCHAR Irq,
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/* Return overridden GSI and flags */
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*Flags = IrqOverrides[Index].Flags;
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*Gsi = IrqOverrides[Index].GlobalSystemInterrupt;
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return;
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}
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}
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@@ -747,6 +777,23 @@ HL::Pic::SendBroadcastIpi(IN ULONG Vector,
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APIC_COMMAND_REGISTER Register;
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BOOLEAN Interrupts;
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/* SMP not implemented */
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if(TRUE)
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{
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/* Check if IPI is addressed to the current CPU */
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if(Self)
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{
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/* Send IPI to the current CPU */
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SendSelfIpi(Vector);
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return;
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}
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else
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{
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/* Nothing to do */
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return;
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}
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}
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/* Check whether interrupts are enabled */
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Interrupts = AR::CpuFunc::InterruptsEnabled();
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