Move memory layout initialization to architecture-specific code

2025-12-16 20:36:16 +01:00
parent 00d428d8de
commit 728241f998
4 changed files with 133 additions and 66 deletions
--- a/xtoskrnl/CMakeLists.txt
+++ b/xtoskrnl/CMakeLists.txt
@@ -51,6 +51,7 @@ list(APPEND XTOSKRNL_SOURCE
    ${XTOSKRNL_SOURCE_DIR}/ke/spinlock.cc
    ${XTOSKRNL_SOURCE_DIR}/ke/sysres.cc
    ${XTOSKRNL_SOURCE_DIR}/ke/timer.cc
+    ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/mmgr.cc
    ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pagemap.cc
    ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/paging.cc
    ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pte.cc
--- a/xtoskrnl/mm/amd64/mmgr.cc
+++ b/xtoskrnl/mm/amd64/mmgr.cc
@@ -0,0 +1,77 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/mm/amd64/mmgr.cc
+ * DESCRIPTION:     Memory Manager
+ * DEVELOPERS:      Aiken Harris <harraiken91@gmail.com>
+ */
+
+#include <xtos.hh>
+
+
+/**
+ * Initializes the kernel's virtual memory layout.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MM::Manager::InitializeMemoryLayout(VOID)
+{
+    ULONG_PTR PagedPoolSize, PteCount;
+    PFN_NUMBER PfnDatabaseSize;
+    ULONG PtesPerPage;
+
+    /* Get the number of PTEs per page and calculate size of paged pool (at least 32MiB) */
+    PtesPerPage = MM::Pte::GetPtesPerPage();
+    PteCount = ((SIZE_TO_PAGES(33554432) + (PtesPerPage - 1)) / PtesPerPage);
+    PagedPoolSize = PteCount * PtesPerPage * MM_PAGE_SIZE;
+
+    /* Retrieve the PFN database size */
+    PfnDatabaseSize = MM::Pfn::GetPfnDatabaseSize();
+
+    /* Define the number of system PTEs */
+    NumberOfSystemPtes = MM_DEFAULT_NUMBER_SYSTEM_PTES;
+
+    /* Check if 5-level paging (LA57) is enabled */
+    if(MM::Paging::GetXpaStatus())
+    {
+        /* Configure memory layout for 5-level paging, using 57bit address space and providing a 128 PB address space */
+        MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFEFA8000000000ULL;
+        MemoryLayout.SelfMapAddress = (PVOID)MM_PML5_SELF_MAP_ADDRESS;
+
+        /* Define the non-paged and paged pool regions */
+        MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
+        MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFEFFFFFFBFFFFFULL;
+        MemoryLayout.PagedPoolStart = (PVOID)0xFFFEF8A000000000ULL;
+        MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
+
+        /* Define hyperspace, system PTE space, and the user space limit */
+        MemoryLayout.HyperSpaceStart = (PVOID)0xFFFEF70000000000ULL;
+        MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFEF77FFFFFFFFFULL;
+        MemoryLayout.SystemSpaceStart = (PVOID)0xFFFEF88000000000ULL;
+        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
+        MemoryLayout.UserSpaceEnd = (PVOID)0x07FFFFFFFFFFFFFULL;
+    }
+    else
+    {
+        /* Configure memory layout for 4-level paging, using 48bit address space and providing a 128 TB address space */
+        MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFFFA8000000000ULL;
+        MemoryLayout.SelfMapAddress = (PVOID)MM_PML4_SELF_MAP_ADDRESS;
+
+        /* Define the non-paged and paged pool regions */
+        MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
+        MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFFFFFFFFBFFFFFULL;
+        MemoryLayout.PagedPoolStart = (PVOID)0xFFFFF8A000000000ULL;
+        MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
+
+        /* Define hyperspace, system PTE space, and the user space limit */
+        MemoryLayout.HyperSpaceStart = (PVOID)0xFFFFF70000000000ULL;
+        MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFFF77FFFFFFFFFULL;
+        MemoryLayout.SystemSpaceStart = (PVOID)0xFFFFF88000000000ULL;
+        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
+        MemoryLayout.UserSpaceEnd = (PVOID)0x000007FFFFFEFFFFULL;
+    }
+}
--- a/xtoskrnl/mm/i686/mmgr.cc
+++ b/xtoskrnl/mm/i686/mmgr.cc
@@ -0,0 +1,55 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/mm/i686/mmgr.cc
+ * DESCRIPTION:     Memory Manager
+ * DEVELOPERS:      Aiken Harris <harraiken91@gmail.com>
+ */
+
+#include <xtos.hh>
+
+
+/**
+ * Initializes the kernel's virtual memory layout.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MM::Manager::InitializeMemoryLayout(VOID)
+{
+    ULONG PhysicalPages;
+
+    /* Not finished yet */
+    UNIMPLEMENTED;
+
+    /* Define the number of system PTEs */
+    NumberOfSystemPtes = MM_DEFAULT_NUMBER_SYSTEM_PTES;
+
+    /* Retrieve the number of physical pages */
+    PhysicalPages = MM::Pfn::GetNumberOfPhysicalPages();
+
+    /* Verify the number of physical pages */
+    if(PhysicalPages < 8192)
+    {
+        /* Less than 32MiB of physical memory (8192 pages), use the minimum number of system PTEs */
+        NumberOfSystemPtes = MM_MINIMUM_NUMBER_SYSTEM_PTES;
+    }
+    else if(PhysicalPages > 32768)
+    {
+        /* More than 128MiB of physical memory (32768 pages), use the maximum number of system PTEs */
+        NumberOfSystemPtes = MM_MAXIMUM_NUMBER_SYSTEM_PTES;
+    }
+
+    /* Check if 3-level paging (PAE) is enabled */
+    if(MM::Paging::GetXpaStatus())
+    {
+        /* Configure memory layout for 3-level paging, using 36bit address space and providing a 64 GB address space */
+    }
+    else
+    {
+        /* Configure memory layout for 2-level paging, using 32bit address space and providing a 4 GB address space */
+    }
+}
--- a/xtoskrnl/mm/mmgr.cc
+++ b/xtoskrnl/mm/mmgr.cc
@@ -32,72 +32,6 @@ MM::Manager::GetNumberOfSystemPtes()
    return NumberOfSystemPtes;
 }

-/**
- * Initializes the kernel's virtual memory layout.
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-MM::Manager::InitializeMemoryLayout(VOID)
-{
-    ULONG_PTR PagedPoolSize, PteCount;
-    PFN_NUMBER PfnDatabaseSize;
-    ULONG PtesPerPage;
-
-    /* Get the number of PTEs per page and calculate size of paged pool (at least 32MiB) */
-    PtesPerPage = MM::Pte::GetPtesPerPage();
-    PteCount = ((SIZE_TO_PAGES(33554432) + (PtesPerPage - 1)) / PtesPerPage);
-    PagedPoolSize = PteCount * PtesPerPage * MM_PAGE_SIZE;
-
-    /* Retrieve the PFN database size */
-    PfnDatabaseSize = MM::Pfn::GetPfnDatabaseSize();
-
-    /* Define the number of system PTEs */
-    NumberOfSystemPtes = MM_DEFAULT_NUMBER_SYSTEM_PTES;
-
-    if(MM::Paging::GetXpaStatus())
-    {
-        /* Configure memory layout for 5-level paging, using 57bit address space and providing a 128 PB address space */
-        MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFEFA8000000000ULL;
-        MemoryLayout.SelfMapAddress = (PVOID)0xFFEDF6FB7DBEDF68ULL;
-
-        /* Define the non-paged and paged pool regions */
-        MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
-        MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFEFFFFFFBFFFFFULL;
-        MemoryLayout.PagedPoolStart = (PVOID)0xFFFEF8A000000000ULL;
-        MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
-
-        /* Define hyperspace, system PTE space, and the user space limit */
-        MemoryLayout.HyperSpaceStart = (PVOID)0xFFFEF70000000000ULL;
-        MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFEF77FFFFFFFFFULL;
-        MemoryLayout.SystemSpaceStart = (PVOID)0xFFFEF88000000000ULL;
-        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
-        MemoryLayout.UserSpaceEnd = (PVOID)0x07FFFFFFFFFFFFFULL;
-    }
-    else
-    {
-        /* Configure memory layout for 4-level paging, using 48bit address space and providing a 128 TB address space */
-        MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFFFA8000000000ULL;
-        MemoryLayout.SelfMapAddress = (PVOID)0xFFFFF6FB7DBEDF68ULL;
-
-        /* Define the non-paged and paged pool regions */
-        MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
-        MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFFFFFFFFFBFFFFFULL;
-        MemoryLayout.PagedPoolStart = (PVOID)0xFFFFF8A000000000ULL;
-        MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
-
-        /* Define hyperspace, system PTE space, and the user space limit */
-        MemoryLayout.HyperSpaceStart = (PVOID)0xFFFFF70000000000ULL;
-        MemoryLayout.HyperSpaceEnd = (PVOID)0xFFFFF77FFFFFFFFFULL;
-        MemoryLayout.SystemSpaceStart = (PVOID)0xFFFFF88000000000ULL;
-        MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
-        MemoryLayout.UserSpaceEnd = (PVOID)0x000007FFFFFEFFFFULL;
-    }
-}
-
 /**
 * Performs an early initialization of the XTOS Memory Manager.
 *