diff --git a/sdk/xtdk/bltypes.h b/sdk/xtdk/bltypes.h index 5971eef..4bdbe79 100644 --- a/sdk/xtdk/bltypes.h +++ b/sdk/xtdk/bltypes.h @@ -71,7 +71,7 @@ typedef VOID (*PBL_CONSOLE_RESET_INPUT_BUFFER)(); typedef VOID (*PBL_CONSOLE_SET_ATTRIBUTES)(IN ULONGLONG Attributes); typedef VOID (*PBL_CONSOLE_SET_CURSOR_POSITION)(IN ULONGLONG PosX, IN ULONGLONG PosY); typedef VOID (*PBL_CONSOLE_WRITE)(IN PCWSTR String); -typedef SIZE_T (*PBL_COMPARE_MEMORY)(IN PCVOID LeftBuffer, IN PCVOID RightBuffer, IN SIZE_T Length); +typedef SIZE_T (XTAPI *PBL_COMPARE_MEMORY)(IN PCVOID LeftBuffer, IN PCVOID RightBuffer, IN SIZE_T Length); typedef SIZE_T (XTAPI *PBL_WIDESTRING_COMPARE)(IN PCWSTR String1, IN PCWSTR String2, IN SIZE_T Length); typedef VOID (XTAPI *PBL_COPY_MEMORY)(OUT PVOID Destination, IN PCVOID Source, IN SIZE_T Length); typedef VOID (*PBL_DEBUG_PRINT)(IN PCWSTR Format, IN ...); @@ -101,7 +101,7 @@ typedef VOID (XTCDECL *PBL_LLIST_REMOVE_ENTRY)(IN PLIST_ENTRY Entry); typedef EFI_STATUS (*PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *MemoryMapAddress, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine); typedef EFI_STATUS (*PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR VirtualAddress, IN ULONG_PTR PhysicalAddress, IN ULONG NumberOfPages); typedef EFI_STATUS (*PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN PVOID VirtualAddress, IN PVOID PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType); -typedef VOID (*PBL_MOVE_MEMORY)(IN OUT PVOID Destination, IN PCVOID Source, IN SIZE_T Length); +typedef VOID (XTAPI *PBL_MOVE_MEMORY)(IN OUT PVOID Destination, IN PCVOID Source, IN SIZE_T Length); typedef EFI_STATUS (*PBL_OPEN_VOLUME)(IN PEFI_DEVICE_PATH_PROTOCOL DevicePath, OUT PEFI_HANDLE DiskHandle, OUT PEFI_FILE_HANDLE *FsHandle); typedef EFI_STATUS (*PBL_OPEN_PROTOCOL)(OUT PEFI_HANDLE Handle, OUT PVOID *ProtocolHandler, IN PEFI_GUID ProtocolGuid); typedef EFI_STATUS (*PBL_OPEN_PROTOCOL_HANDLE)(IN EFI_HANDLE Handle, OUT PVOID *ProtocolHandler, IN PEFI_GUID ProtocolGuid); diff --git a/xtldr/modules/xtos_o/i686/memory.cc b/xtldr/modules/xtos_o/i686/memory.cc index b0b4203..d31103e 100644 --- a/xtldr/modules/xtos_o/i686/memory.cc +++ b/xtldr/modules/xtos_o/i686/memory.cc @@ -26,11 +26,11 @@ Xtos::DeterminePagingLevel(IN CONST PWCHAR Parameters) CPUID_REGISTERS CpuRegisters; /* Prepare CPUID registers to query for PAE support */ - RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS)); + XtLdrProtocol->Memory.ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS)); CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES; /* Query CPUID */ - ArCpuId(&CpuRegisters); + XtLdrProtocol->Cpu.CpuId(&CpuRegisters); /* Check if eXtended Physical Addressing (XPA) is enabled and if PAE is supported by the CPU */ if((CpuRegisters.Edx & CPUID_FEATURES_EDX_PAE) && @@ -89,27 +89,27 @@ Xtos::EnablePaging(IN PXTBL_PAGE_MAPPING PageMap) } /* Disable paging */ - ArWriteControlRegister(0, ArReadControlRegister(0) & ~CR0_PG); + XtLdrProtocol->Cpu.WriteControlRegister(0, XtLdrProtocol->Cpu.ReadControlRegister(0) & ~CR0_PG); /* Check the configured page map level to set the PAE state accordingly */ if(PageMap->PageMapLevel == 3) { /* Enable Physical Address Extension (PAE) */ XtLdrProtocol->Debug.Print(L"Enabling Physical Address Extension (PAE)\n"); - ArWriteControlRegister(4, ArReadControlRegister(4) | CR4_PAE); + XtLdrProtocol->Cpu.WriteControlRegister(4, XtLdrProtocol->Cpu.ReadControlRegister(4) | CR4_PAE); } else { /* Disable Physical Address Extension (PAE) */ XtLdrProtocol->Debug.Print(L"Disabling Physical Address Extension (PAE)\n"); - ArWriteControlRegister(4, ArReadControlRegister(4) & ~CR4_PAE); + XtLdrProtocol->Cpu.WriteControlRegister(4, XtLdrProtocol->Cpu.ReadControlRegister(4) & ~CR4_PAE); } /* Write page mappings to CR3 */ - ArWriteControlRegister(3, (UINT_PTR)PageMap->PtePointer); + XtLdrProtocol->Cpu.WriteControlRegister(3, (UINT_PTR)PageMap->PtePointer); /* Enable paging */ - ArWriteControlRegister(0, ArReadControlRegister(0) | CR0_PG); + XtLdrProtocol->Cpu.WriteControlRegister(0, XtLdrProtocol->Cpu.ReadControlRegister(0) | CR0_PG); /* Return success */ return STATUS_EFI_SUCCESS; @@ -143,7 +143,7 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap) } /* Zero fill allocated memory */ - RtlZeroMemory((PVOID)Address, EFI_PAGE_SIZE); + XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE); /* Check if PAE is enabled (3-level paging) */ if(PageMap->PageMapLevel == 3) @@ -152,7 +152,7 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap) PdeBase = (PHARDWARE_MODERN_PTE)(((PHARDWARE_MODERN_PTE)PageMap->PtePointer)[MM_HARDWARE_VA_START >> MM_PPI_SHIFT].PageFrameNumber << MM_PAGE_SHIFT); /* Make PDE valid */ - RtlZeroMemory(&PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF], sizeof(HARDWARE_MODERN_PTE)); + XtLdrProtocol->Memory.ZeroMemory(&PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF], sizeof(HARDWARE_MODERN_PTE)); PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF].PageFrameNumber = Address >> MM_PAGE_SHIFT; PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF].Valid = 1; PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF].Writable = 1; @@ -170,7 +170,7 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap) } /* Make PDE valid */ - RtlZeroMemory(&LegacyPdeBase[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT], sizeof(HARDWARE_LEGACY_PTE)); + XtLdrProtocol->Memory.ZeroMemory(&LegacyPdeBase[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT], sizeof(HARDWARE_LEGACY_PTE)); LegacyPdeBase[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT].Valid = 1; LegacyPdeBase[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT].PageFrameNumber = Address >> MM_PAGE_SHIFT; LegacyPdeBase[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT].Writable = 1;