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Add APIC Logical Destination Register (LDR) shifts and correct APIC delivery mode values
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This commit is contained in:
Rafal Kupiec 2024-07-23 20:14:06 +02:00
parent 2e7793dc2b
commit 7b8f4f15cc
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
2 changed files with 24 additions and 16 deletions
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20
sdk/xtdk/amd64/hltypes.h
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@ -43,19 +43,23 @@
#define APIC_DF_CLUSTER 0x0FFFFFFF #define APIC_DF_CLUSTER 0x0FFFFFFF
/* APIC delivery modes */ /* APIC delivery modes */
#define APIC_DM_FIXED 0 #define APIC_DM_FIXED 0x00000000
#define APIC_DM_LOWPRIO 1 #define APIC_DM_LOWPRIO 0x00000100
#define APIC_DM_SMI 2 #define APIC_DM_SMI 0x00000200
#define APIC_DM_REMOTE 3 #define APIC_DM_REMOTE 0x00000300
#define APIC_DM_NMI 4 #define APIC_DM_NMI 0x00000400
#define APIC_DM_INIT 5 #define APIC_DM_INIT 0x00000500
#define APIC_DM_STARTUP 6 #define APIC_DM_STARTUP 0x00000600
#define APIC_DM_EXTINT 7 #define APIC_DM_EXTINT 0x00000700
/* APIC trigger modes */ /* APIC trigger modes */
#define APIC_TGM_EDGE 0 #define APIC_TGM_EDGE 0
#define APIC_TGM_LEVEL 1 #define APIC_TGM_LEVEL 1
/* APIC LDR (Logical Destination Register) shifts */
#define APIC_X2APIC_LDR_SHIFT 16
#define APIC_XAPIC_LDR_SHIFT 24
/* Maximum number of I/O APICs */ /* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64 #define APIC_MAX_IOAPICS 64

20
sdk/xtdk/i686/hltypes.h
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@ -48,19 +48,23 @@
#define APIC_DF_CLUSTER 0x0FFFFFFF #define APIC_DF_CLUSTER 0x0FFFFFFF
/* APIC delivery modes */ /* APIC delivery modes */
#define APIC_DM_FIXED 0 #define APIC_DM_FIXED 0x00000000
#define APIC_DM_LOWPRIO 1 #define APIC_DM_LOWPRIO 0x00000100
#define APIC_DM_SMI 2 #define APIC_DM_SMI 0x00000200
#define APIC_DM_REMOTE 3 #define APIC_DM_REMOTE 0x00000300
#define APIC_DM_NMI 4 #define APIC_DM_NMI 0x00000400
#define APIC_DM_INIT 5 #define APIC_DM_INIT 0x00000500
#define APIC_DM_STARTUP 6 #define APIC_DM_STARTUP 0x00000600
#define APIC_DM_EXTINT 7 #define APIC_DM_EXTINT 0x00000700
/* APIC trigger modes */ /* APIC trigger modes */
#define APIC_TGM_EDGE 0 #define APIC_TGM_EDGE 0
#define APIC_TGM_LEVEL 1 #define APIC_TGM_LEVEL 1
/* APIC LDR (Logical Destination Register) shifts */
#define APIC_X2APIC_LDR_SHIFT 16
#define APIC_XAPIC_LDR_SHIFT 24
/* Maximum number of I/O APICs */ /* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64 #define APIC_MAX_IOAPICS 64