From 7d8bfa8f0a7468c810d18b556e7c760aca4bea80 Mon Sep 17 00:00:00 2001 From: Aiken Harris Date: Thu, 9 Apr 2026 20:25:55 +0200 Subject: [PATCH] Implement support for APIC Self-InterProcessor Interrupts (SIPI) --- sdk/xtdk/amd64/hltypes.h | 1 + sdk/xtdk/i686/hltypes.h | 1 + xtoskrnl/hl/x86/pic.cc | 27 +++++++++++++++++++++++++++ xtoskrnl/includes/hl/pic.hh | 1 + 4 files changed, 30 insertions(+) diff --git a/sdk/xtdk/amd64/hltypes.h b/sdk/xtdk/amd64/hltypes.h index 7faaa5d..cbbe120 100644 --- a/sdk/xtdk/amd64/hltypes.h +++ b/sdk/xtdk/amd64/hltypes.h @@ -134,6 +134,7 @@ typedef enum _APIC_REGISTER APIC_TICR = 0x38, /* Initial Count Register for Timer */ APIC_TCCR = 0x39, /* Current Count Register for Timer */ APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */ + APIC_SIPI = 0x3F, /* Self-IPI Register */ APIC_EAFR = 0x40, /* extended APIC Feature register */ APIC_EACR = 0x41, /* Extended APIC Control Register */ APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */ diff --git a/sdk/xtdk/i686/hltypes.h b/sdk/xtdk/i686/hltypes.h index ae5b151..e0f3ccc 100644 --- a/sdk/xtdk/i686/hltypes.h +++ b/sdk/xtdk/i686/hltypes.h @@ -141,6 +141,7 @@ typedef enum _APIC_REGISTER APIC_TICR = 0x38, /* Initial Count Register for Timer */ APIC_TCCR = 0x39, /* Current Count Register for Timer */ APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */ + APIC_SIPI = 0x3F, /* Self-IPI Register */ APIC_EAFR = 0x40, /* extended APIC Feature register */ APIC_EACR = 0x41, /* Extended APIC Control Register */ APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */ diff --git a/xtoskrnl/hl/x86/pic.cc b/xtoskrnl/hl/x86/pic.cc index 7a2630f..054f859 100644 --- a/xtoskrnl/hl/x86/pic.cc +++ b/xtoskrnl/hl/x86/pic.cc @@ -404,6 +404,33 @@ HL::Pic::SendIpi(ULONG ApicId, } } +/** + * Sends a Self-IPI (Inter-Processor Interrupt) to the current CPU. + * + * @param Vector + * Supplies the IPI vector to send. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HL::Pic::SendSelfIpi(ULONG Vector) +{ + /* Check current APIC mode */ + if(ApicMode == APIC_MODE_X2APIC) + { + /* In x2APIC mode, a dedicated Self-IPI register is used */ + WriteApicRegister(APIC_SIPI, Vector); + } + else + { + /* In xAPIC compatibility mode, ICR0 is used */ + WriteApicRegister(APIC_ICR0, Vector | (1 << 18)); + } +} + /** * Writes to the APIC register. * diff --git a/xtoskrnl/includes/hl/pic.hh b/xtoskrnl/includes/hl/pic.hh index 02b8145..5077ea7 100644 --- a/xtoskrnl/includes/hl/pic.hh +++ b/xtoskrnl/includes/hl/pic.hh @@ -28,6 +28,7 @@ namespace HL STATIC XTAPI VOID SendEoi(VOID); STATIC XTAPI VOID SendIpi(ULONG ApicId, ULONG Vector); + STATIC XTAPI VOID SendSelfIpi(ULONG Vector); STATIC XTFASTCALL VOID WriteApicRegister(IN APIC_REGISTER Register, IN ULONGLONG Value);