From 7f8846f23d038a8645d74e404731eb7a16177cc0 Mon Sep 17 00:00:00 2001 From: Rafal Kupiec Date: Mon, 27 May 2024 22:17:30 +0200 Subject: [PATCH] Map memory for hardware layer on i686 --- sdk/xtdk/i686/mmtypes.h | 3 ++ xtldr/modules/xtos_o/i686/memory.c | 79 +++++++++++++++++++++++++----- 2 files changed, 71 insertions(+), 11 deletions(-) diff --git a/sdk/xtdk/i686/mmtypes.h b/sdk/xtdk/i686/mmtypes.h index 8519662..ffeae5c 100644 --- a/sdk/xtdk/i686/mmtypes.h +++ b/sdk/xtdk/i686/mmtypes.h @@ -28,6 +28,9 @@ #define MM_PDI_SHIFT 21 #define MM_PPI_SHIFT 30 +/* PTE legacy shift values */ +#define MM_PDI_LEGACY_SHIFT 22 + /* Minimum number of physical pages needed by the system */ #define MM_MINIMUM_PHYSICAL_PAGES 1100 diff --git a/xtldr/modules/xtos_o/i686/memory.c b/xtldr/modules/xtos_o/i686/memory.c index 1084ff3..fc1975c 100644 --- a/xtldr/modules/xtos_o/i686/memory.c +++ b/xtldr/modules/xtos_o/i686/memory.c @@ -9,20 +9,68 @@ #include +#define HAL_MEMORY 0xFFC00000 + +/** + * Maps the page table for hardware layer addess space. + * + * @param PageMap + * Supplies a pointer to the page mapping structure. + * + * @return This routine returns a status code. + * + * @since XT 1.0 + */ +XTCDECL +EFI_STATUS +XtMapHalMemory(IN PXTBL_PAGE_MAPPING PageMap) +{ + XTSTATUS Status; + EFI_PHYSICAL_ADDRESS Address; + PHARDWARE_PTE Pml3; + ULONGLONG PmlIndex; + ULONG Index; + PHARDWARE_PTE PdeBase; + + /* Allocate memory */ + Status = XtLdrProtocol->Memory.AllocatePages(1, &Address); + if(Status != STATUS_EFI_SUCCESS) + { + /* Memory allocation failure, return error */ + return Status; + } + + /* Zero fill allocated memory */ + RtlZeroMemory((PVOID)Address, EFI_PAGE_SIZE); + + /* Check page map level */ + if(PageMap->PageMapLevel == 3) + { + /* Get PDE base address (PAE enabled) */ + PdeBase = (PHARDWARE_PTE)(((PHARDWARE_PTE)PageMap->PtePointer)[MM_HAL_VA_START >> MM_PPI_SHIFT].PageFrameNumber << MM_PAGE_SHIFT); + + /* Make PDE valid */ + PdeBase[(MM_HAL_VA_START >> MM_PDI_SHIFT) & 0x1FF].PageFrameNumber = Address >> MM_PAGE_SHIFT; + PdeBase[(MM_HAL_VA_START >> MM_PDI_SHIFT) & 0x1FF].Valid = 1; + PdeBase[(MM_HAL_VA_START >> MM_PDI_SHIFT) & 0x1FF].Writable = 1; + } + else + { + /* Make PDE valid (PAE disabled) */ + ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[MM_HAL_VA_START >> MM_PDI_LEGACY_SHIFT].Valid = 1; + ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[MM_HAL_VA_START >> MM_PDI_LEGACY_SHIFT].PageFrameNumber = Address >> MM_PAGE_SHIFT; + ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[MM_HAL_VA_START >> MM_PDI_LEGACY_SHIFT].Writable = 1; + } + + /* Return success */ + return STATUS_EFI_SUCCESS; +} + /** * Builds the actual memory mapping page table and enables paging. This routine exits EFI boot services as well. * - * @param MemoryMappings - * Supplies a pointer to linked list containing all memory mappings. - * - * @param VirtualAddress - * Supplies a pointer to the next valid, free and available virtual address. - * - * @param ImageProtocol - * A pointer to the EFI loaded image protocol with information about where in memory the loader code was placed. - * - * @param PtePointer - * Supplies a pointer to memory area containing a Page Table Entries (PTE). + * @param PageMap + * Supplies a pointer to the page mapping structure. * * @return This routine returns a status code. * @@ -63,6 +111,15 @@ XtEnablePaging(IN PXTBL_PAGE_MAPPING PageMap) return Status; } + /* Map memory for hardware layer */ + Status = XtMapHalMemory(PageMap); + if(Status != STATUS_EFI_SUCCESS) + { + /* Failed to map memory for hardware layer */ + XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status); + return Status; + } + /* Exit EFI Boot Services */ XtLdrProtocol->Debug.Print(L"Exiting EFI boot services\n"); Status = XtLdrProtocol->Util.ExitBootServices();