Enable allocated APIC interrupt and validate IO APIC mapping
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@@ -52,7 +52,7 @@ HL::Pic::AllocateSystemInterrupt(IN UCHAR Irq,
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Register.DeliveryStatus = 0;
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Register.DeliveryStatus = 0;
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Register.Destination = HL::Pic::ReadApicRegister(APIC_ID) >> 24;
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Register.Destination = HL::Pic::ReadApicRegister(APIC_ID) >> 24;
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Register.DestinationMode = APIC_DM_Physical;
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Register.DestinationMode = APIC_DM_Physical;
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Register.Mask = 1;
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Register.Mask = 0;
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Register.PinPolarity = ((Flags & 0x03) == 0x03) ? 1 : 0;
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Register.PinPolarity = ((Flags & 0x03) == 0x03) ? 1 : 0;
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Register.RemoteIRR = 0;
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Register.RemoteIRR = 0;
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Register.Reserved = 0;
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Register.Reserved = 0;
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@@ -483,10 +483,15 @@ HL::Pic::InitializeIOApic(VOID)
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while(ControllerIndex < ControllerCount)
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while(ControllerIndex < ControllerCount)
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{
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{
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/* Map the I/O APIC controller memory into hardware space */
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/* Map the I/O APIC controller memory into hardware space */
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MM::HardwarePool::MapHardwareMemory(Controllers[ControllerIndex].PhysicalAddress,
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Status = MM::HardwarePool::MapHardwareMemory(Controllers[ControllerIndex].PhysicalAddress,
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1,
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1,
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FALSE,
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FALSE,
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(PVOID*)&Controllers[ControllerIndex].VirtualAddress);
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(PVOID*)&Controllers[ControllerIndex].VirtualAddress);
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if(Status != STATUS_SUCCESS || Controllers[ControllerIndex].VirtualAddress == 0)
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{
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DebugPrint(L"ERROR: Failed to map I/O APIC Controller\n");
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KE::Crash::Panic(0x0E, 0x0, 0x0, 0x0, 0x0);
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}
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/* Perform a memory barrier */
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/* Perform a memory barrier */
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AR::CpuFunc::MemoryBarrier();
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AR::CpuFunc::MemoryBarrier();
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